1*de820365STom Rini /* 2*de820365STom Rini * Copyright (C) 2010 Texas Instruments 3*de820365STom Rini * 4*de820365STom Rini * Based on: 5*de820365STom Rini * 6*de820365STom Rini * ---------------------------------------------------------------------------- 7*de820365STom Rini * 8*de820365STom Rini * dm644x_emac.h 9*de820365STom Rini * 10*de820365STom Rini * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM 11*de820365STom Rini * 12*de820365STom Rini * Copyright (C) 2005 Texas Instruments. 13*de820365STom Rini * 14*de820365STom Rini * ---------------------------------------------------------------------------- 15*de820365STom Rini * 16*de820365STom Rini * SPDX-License-Identifier: GPL-2.0+ 17*de820365STom Rini * 18*de820365STom Rini */ 19*de820365STom Rini 20*de820365STom Rini #ifndef _EMAC_DEFS_H_ 21*de820365STom Rini #define _EMAC_DEFS_H_ 22*de820365STom Rini 23*de820365STom Rini #ifdef CONFIG_TI816X 24*de820365STom Rini #define EMAC_BASE_ADDR (0x4A100000) 25*de820365STom Rini #define EMAC_WRAPPER_BASE_ADDR (0x4A100900) 26*de820365STom Rini #define EMAC_WRAPPER_RAM_ADDR (0x4A102000) 27*de820365STom Rini #define EMAC_MDIO_BASE_ADDR (0x4A100800) 28*de820365STom Rini #define EMAC_MDIO_BUS_FREQ (250000000UL) 29*de820365STom Rini #define EMAC_MDIO_CLOCK_FREQ (2000000UL) 30*de820365STom Rini 31*de820365STom Rini typedef volatile unsigned int dv_reg; 32*de820365STom Rini typedef volatile unsigned int *dv_reg_p; 33*de820365STom Rini 34*de820365STom Rini #define DAVINCI_EMAC_VERSION2 35*de820365STom Rini #define DAVINCI_EMAC_GIG_ENABLE 36*de820365STom Rini #endif 37*de820365STom Rini 38*de820365STom Rini #endif /* _EMAC_DEFS_H_ */ 39