xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-am33xx/clock.h (revision 94d77fb656d49f2b0efe2de5605a52c5145d2c3b)
1 /*
2  * clock.h
3  *
4  * clock header
5  *
6  * Copyright (C) 2011, Texas Instruments Incorporated - http://www.ti.com/
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef _CLOCKS_H_
12 #define _CLOCKS_H_
13 
14 #include <asm/arch/clocks_am33xx.h>
15 
16 #define LDELAY 1000000
17 
18 /* CM_CLKMODE_DPLL */
19 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT		11
20 #define CM_CLKMODE_DPLL_REGM4XEN_MASK		(1 << 11)
21 #define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT		10
22 #define CM_CLKMODE_DPLL_LPMODE_EN_MASK		(1 << 10)
23 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT	9
24 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK	(1 << 9)
25 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT	8
26 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK	(1 << 8)
27 #define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT		5
28 #define CM_CLKMODE_DPLL_RAMP_RATE_MASK		(0x7 << 5)
29 #define CM_CLKMODE_DPLL_EN_SHIFT		0
30 #define CM_CLKMODE_DPLL_EN_MASK			(0x7 << 0)
31 
32 #define CM_CLKMODE_DPLL_DPLL_EN_SHIFT		0
33 #define CM_CLKMODE_DPLL_DPLL_EN_MASK		7
34 
35 #define DPLL_EN_STOP			1
36 #define DPLL_EN_MN_BYPASS		4
37 #define DPLL_EN_LOW_POWER_BYPASS	5
38 #define DPLL_EN_LOCK			7
39 
40 /* CM_IDLEST_DPLL fields */
41 #define ST_DPLL_CLK_MASK		1
42 
43 /* CM_CLKSEL_DPLL */
44 #define CM_CLKSEL_DPLL_M_SHIFT			8
45 #define CM_CLKSEL_DPLL_M_MASK			(0x7FF << 8)
46 #define CM_CLKSEL_DPLL_N_SHIFT			0
47 #define CM_CLKSEL_DPLL_N_MASK			0x7F
48 
49 struct dpll_params {
50 	u32 m;
51 	u32 n;
52 	s8 m2;
53 	s8 m3;
54 	s8 m4;
55 	s8 m5;
56 	s8 m6;
57 };
58 
59 struct dpll_regs {
60 	u32 cm_clkmode_dpll;
61 	u32 cm_idlest_dpll;
62 	u32 cm_autoidle_dpll;
63 	u32 cm_clksel_dpll;
64 	u32 cm_div_m2_dpll;
65 	u32 cm_div_m3_dpll;
66 	u32 cm_div_m4_dpll;
67 	u32 cm_div_m5_dpll;
68 	u32 cm_div_m6_dpll;
69 };
70 
71 extern const struct dpll_regs dpll_mpu_regs;
72 extern const struct dpll_regs dpll_core_regs;
73 extern const struct dpll_regs dpll_per_regs;
74 extern const struct dpll_regs dpll_ddr_regs;
75 extern const struct dpll_params dpll_mpu;
76 extern const struct dpll_params dpll_core;
77 extern const struct dpll_params dpll_per;
78 extern const struct dpll_params dpll_ddr;
79 
80 extern const struct cm_wkuppll *cmwkup;
81 
82 void setup_dplls(void);
83 const struct dpll_params *get_dpll_ddr_params(void);
84 void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *);
85 
86 #endif
87