xref: /rk3399_rockchip-uboot/arch/arm/dts/tegra30.dtsi (revision d08b9e9c7e22c205075d16eec42f452b1daae277)
1/include/ "skeleton.dtsi"
2
3/ {
4	compatible = "nvidia,tegra30";
5
6	tegra_car: clock@60006000 {
7		compatible = "nvidia,tegra30-car", "nvidia,tegra20-car";
8		reg = <0x60006000 0x1000>;
9		#clock-cells = <1>;
10	};
11
12	clocks {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		osc: clock {
17			compatible = "fixed-clock";
18			#clock-cells = <0>;
19		};
20	};
21
22	i2c@7000c000 {
23		#address-cells = <1>;
24		#size-cells = <0>;
25		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
26		reg = <0x7000C000 0x100>;
27		/* PERIPH_ID_I2C1, CLK_M */
28		clocks = <&tegra_car 12>;
29	};
30
31	i2c@7000c400 {
32		#address-cells = <1>;
33		#size-cells = <0>;
34		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
35		reg = <0x7000C400 0x100>;
36		/* PERIPH_ID_I2C2, CLK_M */
37		clocks = <&tegra_car 54>;
38	};
39
40	i2c@7000c500 {
41		#address-cells = <1>;
42		#size-cells = <0>;
43		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
44		reg = <0x7000C500 0x100>;
45		/* PERIPH_ID_I2C3, CLK_M */
46		clocks = <&tegra_car 67>;
47	};
48
49	i2c@7000c700 {
50		#address-cells = <1>;
51		#size-cells = <0>;
52		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
53		reg = <0x7000C700 0x100>;
54		/* PERIPH_ID_I2C4, CLK_M */
55		clocks = <&tegra_car 103>;
56	};
57
58	i2c@7000d000 {
59		#address-cells = <1>;
60		#size-cells = <0>;
61		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
62		reg = <0x7000D000 0x100>;
63		/* PERIPH_ID_I2C_DVC, CLK_M */
64		clocks = <&tegra_car 47>;
65	};
66};
67