xref: /rk3399_rockchip-uboot/arch/arm/dts/tegra30-apalis.dts (revision 25ca385dd698496e246bc6a45422ee00a2bba039)
1/dts-v1/;
2
3#include "tegra30.dtsi"
4
5/ {
6	model = "Toradex Apalis T30";
7	compatible = "toradex,apalis_t30", "nvidia,tegra30";
8
9	aliases {
10		i2c0 = "/i2c@7000d000";
11		i2c1 = "/i2c@7000c000";
12		i2c2 = "/i2c@7000c500";
13		i2c3 = "/i2c@7000c700";
14		sdhci0 = "/sdhci@78000600";
15		sdhci1 = "/sdhci@78000400";
16		sdhci2 = "/sdhci@78000000";
17		usb0 = "/usb@7d000000";
18		usb1 = "/usb@7d004000";
19		usb2 = "/usb@7d008000";
20	};
21
22	memory {
23		device_type = "memory";
24		reg = <0x80000000 0x40000000>;
25	};
26
27	pcie-controller@00003000 {
28		status = "okay";
29		avdd-pexa-supply = <&vdd2_reg>;
30		vdd-pexa-supply = <&vdd2_reg>;
31		avdd-pexb-supply = <&vdd2_reg>;
32		vdd-pexb-supply = <&vdd2_reg>;
33		avdd-pex-pll-supply = <&vdd2_reg>;
34		avdd-plle-supply = <&ldo6_reg>;
35		vddio-pex-ctl-supply = <&sys_3v3_reg>;
36		hvdd-pex-supply = <&sys_3v3_reg>;
37
38		pci@1,0 {
39			nvidia,num-lanes = <4>;
40		};
41
42		pci@2,0 {
43			nvidia,num-lanes = <1>;
44		};
45
46		pci@3,0 {
47			status = "okay";
48			nvidia,num-lanes = <1>;
49		};
50	};
51
52	/*
53	 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
54	 * board)
55	 */
56	i2c@7000c000 {
57		status = "okay";
58		clock-frequency = <100000>;
59	};
60
61	/* GEN2_I2C: unused */
62
63	/*
64	 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
65	 * carrier board)
66	 */
67	i2c@7000c500 {
68		status = "okay";
69		clock-frequency = <100000>;
70	};
71
72	/* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
73	i2c@7000c700 {
74		status = "okay";
75		clock-frequency = <100000>;
76	};
77
78	/*
79	 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
80	 * touch screen controller
81	 */
82	i2c@7000d000 {
83		status = "okay";
84		clock-frequency = <100000>;
85
86		pmic: tps65911@2d {
87			compatible = "ti,tps65911";
88			reg = <0x2d>;
89
90			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
91			#interrupt-cells = <2>;
92			interrupt-controller;
93
94			ti,system-power-controller;
95
96			#gpio-cells = <2>;
97			gpio-controller;
98
99			vcc1-supply = <&sys_3v3_reg>;
100			vcc2-supply = <&sys_3v3_reg>;
101			vcc3-supply = <&vio_reg>;
102			vcc4-supply = <&sys_3v3_reg>;
103			vcc5-supply = <&sys_3v3_reg>;
104			vcc6-supply = <&vio_reg>;
105			vcc7-supply = <&charge_pump_5v0_reg>;
106			vccio-supply = <&sys_3v3_reg>;
107
108			regulators {
109				#address-cells = <1>;
110				#size-cells = <0>;
111
112				/* SW1: +V1.35_VDDIO_DDR */
113				vdd1_reg: vdd1 {
114					regulator-name = "vddio_ddr_1v35";
115					regulator-min-microvolt = <1350000>;
116					regulator-max-microvolt = <1350000>;
117					regulator-always-on;
118				};
119
120				/* SW2: +V1.05 */
121				vdd2_reg: vdd2 {
122					regulator-name =
123						"vdd_pexa,vdd_pexb,vdd_sata";
124					regulator-min-microvolt = <1050000>;
125					regulator-max-microvolt = <1050000>;
126				};
127
128				/* SW CTRL: +V1.0_VDD_CPU */
129				vddctrl_reg: vddctrl {
130					regulator-name = "vdd_cpu,vdd_sys";
131					regulator-min-microvolt = <1150000>;
132					regulator-max-microvolt = <1150000>;
133					regulator-always-on;
134				};
135
136				/* SWIO: +V1.8 */
137				vio_reg: vio {
138					regulator-name = "vdd_1v8_gen";
139					regulator-min-microvolt = <1800000>;
140					regulator-max-microvolt = <1800000>;
141					regulator-always-on;
142				};
143
144				/* LDO1: unused */
145
146				/*
147				 * EN_+V3.3 switching via FET:
148				 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
149				 * see also v3_3 fixed supply
150				 */
151				ldo2_reg: ldo2 {
152					regulator-name = "en_3v3";
153					regulator-min-microvolt = <3300000>;
154					regulator-max-microvolt = <3300000>;
155					regulator-always-on;
156				};
157
158				/* +V1.2_CSI */
159				ldo3_reg: ldo3 {
160					regulator-name =
161						"avdd_dsi_csi,pwrdet_mipi";
162					regulator-min-microvolt = <1200000>;
163					regulator-max-microvolt = <1200000>;
164				};
165
166				/* +V1.2_VDD_RTC */
167				ldo4_reg: ldo4 {
168					regulator-name = "vdd_rtc";
169					regulator-min-microvolt = <1200000>;
170					regulator-max-microvolt = <1200000>;
171					regulator-always-on;
172				};
173
174				/*
175				 * +V2.8_AVDD_VDAC:
176				 * only required for analog RGB
177				 */
178				ldo5_reg: ldo5 {
179					regulator-name = "avdd_vdac";
180					regulator-min-microvolt = <2800000>;
181					regulator-max-microvolt = <2800000>;
182					regulator-always-on;
183				};
184
185				/*
186				 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
187				 * but LDO6 can't set voltage in 50mV
188				 * granularity
189				 */
190				ldo6_reg: ldo6 {
191					regulator-name = "avdd_plle";
192					regulator-min-microvolt = <1100000>;
193					regulator-max-microvolt = <1100000>;
194				};
195
196				/* +V1.2_AVDD_PLL */
197				ldo7_reg: ldo7 {
198					regulator-name = "avdd_pll";
199					regulator-min-microvolt = <1200000>;
200					regulator-max-microvolt = <1200000>;
201					regulator-always-on;
202				};
203
204				/* +V1.0_VDD_DDR_HS */
205				ldo8_reg: ldo8 {
206					regulator-name = "vdd_ddr_hs";
207					regulator-min-microvolt = <1000000>;
208					regulator-max-microvolt = <1000000>;
209					regulator-always-on;
210				};
211			};
212		};
213	};
214
215	/* SPI1: Apalis SPI1 */
216	spi@7000d400 {
217		status = "okay";
218		spi-max-frequency = <25000000>;
219	};
220
221	/* SPI4: CAN2 */
222	spi@7000da00 {
223		status = "okay";
224		spi-max-frequency = <25000000>;
225	};
226
227	/* SPI5: Apalis SPI2 */
228	spi@7000dc00 {
229		status = "okay";
230		spi-max-frequency = <25000000>;
231	};
232
233	/* SPI6: CAN1 */
234	spi@7000de00 {
235		status = "okay";
236		spi-max-frequency = <25000000>;
237	};
238
239	sdhci@78000000 {
240		status = "okay";
241		bus-width = <4>;
242		cd-gpios = <&gpio 229 1>; /* PCC5, SD1_CD# */
243	};
244
245	sdhci@78000400 {
246		status = "okay";
247		bus-width = <8>;
248		cd-gpios = <&gpio 171 1>; /* PV3, MMC1_CD# */
249	};
250
251	sdhci@78000600 {
252		status = "okay";
253		bus-width = <8>;
254		non-removable;
255	};
256
257	/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
258	usb@7d000000 {
259		status = "okay";
260		dr_mode = "peripheral";
261		nvidia,vbus-gpio = <&gpio 157 0>;	/* PT5, USBO1_EN */
262	};
263
264	/* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
265	usb@7d004000 {
266		status = "okay";
267		nvidia,vbus-gpio = <&gpio 233 0>;	/* PDD1, USBH_EN */
268		phy_type = "utmi";
269	};
270
271	/* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
272	usb@7d008000 {
273		status = "okay";
274		nvidia,vbus-gpio = <&gpio 233 0>;	/* PDD1, USBH_EN */
275	};
276
277	regulators {
278		compatible = "simple-bus";
279		#address-cells = <1>;
280		#size-cells = <0>;
281
282		sys_3v3_reg: regulator@100 {
283			compatible = "regulator-fixed";
284			reg = <100>;
285			regulator-name = "3v3";
286			regulator-min-microvolt = <3300000>;
287			regulator-max-microvolt = <3300000>;
288			regulator-always-on;
289		};
290
291		charge_pump_5v0_reg: regulator@101 {
292			compatible = "regulator-fixed";
293			reg = <101>;
294			regulator-name = "5v0";
295			regulator-min-microvolt = <5000000>;
296			regulator-max-microvolt = <5000000>;
297			regulator-always-on;
298		};
299	};
300};
301