xref: /rk3399_rockchip-uboot/arch/arm/dts/tegra210.dtsi (revision 7aaa5a60cec8c0f139c8be5fea7d639e06a0f88e)
1*7aaa5a60STom Warren#include <dt-bindings/clock/tegra210-car.h>
2*7aaa5a60STom Warren#include <dt-bindings/gpio/tegra-gpio.h>
3*7aaa5a60STom Warren#include <dt-bindings/pinctrl/pinctrl-tegra.h>
4*7aaa5a60STom Warren#include <dt-bindings/interrupt-controller/arm-gic.h>
5*7aaa5a60STom Warren#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
6*7aaa5a60STom Warren
7*7aaa5a60STom Warren#include "skeleton.dtsi"
8*7aaa5a60STom Warren
9*7aaa5a60STom Warren/ {
10*7aaa5a60STom Warren	compatible = "nvidia,tegra210";
11*7aaa5a60STom Warren	interrupt-parent = <&gic>;
12*7aaa5a60STom Warren	#address-cells = <2>;
13*7aaa5a60STom Warren	#size-cells = <2>;
14*7aaa5a60STom Warren
15*7aaa5a60STom Warren	gic: interrupt-controller@0,50041000 {
16*7aaa5a60STom Warren		compatible = "arm,gic-400";
17*7aaa5a60STom Warren		#interrupt-cells = <3>;
18*7aaa5a60STom Warren		interrupt-controller;
19*7aaa5a60STom Warren		reg = <0x0 0x50041000 0x0 0x1000>,
20*7aaa5a60STom Warren		      <0x0 0x50042000 0x0 0x2000>,
21*7aaa5a60STom Warren		      <0x0 0x50044000 0x0 0x2000>,
22*7aaa5a60STom Warren		      <0x0 0x50046000 0x0 0x2000>;
23*7aaa5a60STom Warren		interrupts = <GIC_PPI 9
24*7aaa5a60STom Warren			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
25*7aaa5a60STom Warren		interrupt-parent = <&gic>;
26*7aaa5a60STom Warren	};
27*7aaa5a60STom Warren
28*7aaa5a60STom Warren	tegra_car: clock@0,60006000 {
29*7aaa5a60STom Warren		compatible = "nvidia,tegra210-car";
30*7aaa5a60STom Warren		reg = <0x0 0x60006000 0x0 0x1000>;
31*7aaa5a60STom Warren		#clock-cells = <1>;
32*7aaa5a60STom Warren		#reset-cells = <1>;
33*7aaa5a60STom Warren	};
34*7aaa5a60STom Warren
35*7aaa5a60STom Warren	gpio: gpio@0,6000d000 {
36*7aaa5a60STom Warren		compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
37*7aaa5a60STom Warren		reg = <0x0 0x6000d000 0x0 0x1000>;
38*7aaa5a60STom Warren		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
39*7aaa5a60STom Warren			     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
40*7aaa5a60STom Warren			     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
41*7aaa5a60STom Warren			     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
42*7aaa5a60STom Warren			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
43*7aaa5a60STom Warren			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
44*7aaa5a60STom Warren			     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
45*7aaa5a60STom Warren			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
46*7aaa5a60STom Warren		#gpio-cells = <2>;
47*7aaa5a60STom Warren		gpio-controller;
48*7aaa5a60STom Warren		#interrupt-cells = <2>;
49*7aaa5a60STom Warren		interrupt-controller;
50*7aaa5a60STom Warren	};
51*7aaa5a60STom Warren
52*7aaa5a60STom Warren	i2c@0,7000c000 {
53*7aaa5a60STom Warren		compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
54*7aaa5a60STom Warren		reg = <0x0 0x7000c000 0x0 0x100>;
55*7aaa5a60STom Warren		interrupts = <0 38 0x04>;
56*7aaa5a60STom Warren		#address-cells = <1>;
57*7aaa5a60STom Warren		#size-cells = <0>;
58*7aaa5a60STom Warren		clocks = <&tegra_car 12>;
59*7aaa5a60STom Warren		status = "disabled";
60*7aaa5a60STom Warren	};
61*7aaa5a60STom Warren
62*7aaa5a60STom Warren	i2c@0,7000c400 {
63*7aaa5a60STom Warren		compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
64*7aaa5a60STom Warren		reg = <0x0 0x7000c400 0x0 0x100>;
65*7aaa5a60STom Warren		interrupts = <0 84 0x04>;
66*7aaa5a60STom Warren		#address-cells = <1>;
67*7aaa5a60STom Warren		#size-cells = <0>;
68*7aaa5a60STom Warren		clocks = <&tegra_car 54>;
69*7aaa5a60STom Warren		status = "disabled";
70*7aaa5a60STom Warren	};
71*7aaa5a60STom Warren
72*7aaa5a60STom Warren	i2c@0,7000c500 {
73*7aaa5a60STom Warren		compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
74*7aaa5a60STom Warren		reg = <0x0 0x7000c500 0x0 0x100>;
75*7aaa5a60STom Warren		interrupts = <0 92 0x04>;
76*7aaa5a60STom Warren		#address-cells = <1>;
77*7aaa5a60STom Warren		#size-cells = <0>;
78*7aaa5a60STom Warren		clocks = <&tegra_car 67>;
79*7aaa5a60STom Warren		status = "disabled";
80*7aaa5a60STom Warren	};
81*7aaa5a60STom Warren
82*7aaa5a60STom Warren	i2c@0,7000c700 {
83*7aaa5a60STom Warren		compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
84*7aaa5a60STom Warren		reg = <0x0 0x7000c700 0x0 0x100>;
85*7aaa5a60STom Warren		interrupts = <0 120 0x04>;
86*7aaa5a60STom Warren		#address-cells = <1>;
87*7aaa5a60STom Warren		#size-cells = <0>;
88*7aaa5a60STom Warren		clocks = <&tegra_car 103>;
89*7aaa5a60STom Warren		status = "disabled";
90*7aaa5a60STom Warren	};
91*7aaa5a60STom Warren
92*7aaa5a60STom Warren	i2c@0,7000d000 {
93*7aaa5a60STom Warren		compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
94*7aaa5a60STom Warren		reg = <0x0 0x7000d000 0x0 0x100>;
95*7aaa5a60STom Warren		interrupts = <0 53 0x04>;
96*7aaa5a60STom Warren		#address-cells = <1>;
97*7aaa5a60STom Warren		#size-cells = <0>;
98*7aaa5a60STom Warren		clocks = <&tegra_car 47>;
99*7aaa5a60STom Warren		status = "disabled";
100*7aaa5a60STom Warren	};
101*7aaa5a60STom Warren
102*7aaa5a60STom Warren	i2c@0,7000d100 {
103*7aaa5a60STom Warren		compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
104*7aaa5a60STom Warren		reg = <0x0 0x7000d100 0x0 0x100>;
105*7aaa5a60STom Warren		interrupts = <0 53 0x04>;
106*7aaa5a60STom Warren		#address-cells = <1>;
107*7aaa5a60STom Warren		#size-cells = <0>;
108*7aaa5a60STom Warren		clocks = <&tegra_car 47>;
109*7aaa5a60STom Warren		status = "disabled";
110*7aaa5a60STom Warren	};
111*7aaa5a60STom Warren
112*7aaa5a60STom Warren	uarta: serial@0,70006000 {
113*7aaa5a60STom Warren		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
114*7aaa5a60STom Warren		reg = <0x0 0x70006000 0x0 0x40>;
115*7aaa5a60STom Warren		reg-shift = <2>;
116*7aaa5a60STom Warren		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
117*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_UARTA>;
118*7aaa5a60STom Warren		resets = <&tegra_car 6>;
119*7aaa5a60STom Warren		reset-names = "serial";
120*7aaa5a60STom Warren		status = "disabled";
121*7aaa5a60STom Warren	};
122*7aaa5a60STom Warren
123*7aaa5a60STom Warren	uartb: serial@0,70006040 {
124*7aaa5a60STom Warren		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
125*7aaa5a60STom Warren		reg = <0x0 0x70006040 0x0 0x40>;
126*7aaa5a60STom Warren		reg-shift = <2>;
127*7aaa5a60STom Warren		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
128*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_UARTB>;
129*7aaa5a60STom Warren		resets = <&tegra_car 7>;
130*7aaa5a60STom Warren		reset-names = "serial";
131*7aaa5a60STom Warren		status = "disabled";
132*7aaa5a60STom Warren	};
133*7aaa5a60STom Warren
134*7aaa5a60STom Warren	uartc: serial@0,70006200 {
135*7aaa5a60STom Warren		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
136*7aaa5a60STom Warren		reg = <0x0 0x70006200 0x0 0x40>;
137*7aaa5a60STom Warren		reg-shift = <2>;
138*7aaa5a60STom Warren		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
139*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_UARTC>;
140*7aaa5a60STom Warren		resets = <&tegra_car 55>;
141*7aaa5a60STom Warren		reset-names = "serial";
142*7aaa5a60STom Warren		status = "disabled";
143*7aaa5a60STom Warren	};
144*7aaa5a60STom Warren
145*7aaa5a60STom Warren	uartd: serial@0,70006300 {
146*7aaa5a60STom Warren		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
147*7aaa5a60STom Warren		reg = <0x0 0x70006300 0x0 0x40>;
148*7aaa5a60STom Warren		reg-shift = <2>;
149*7aaa5a60STom Warren		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
150*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_UARTD>;
151*7aaa5a60STom Warren		resets = <&tegra_car 65>;
152*7aaa5a60STom Warren		reset-names = "serial";
153*7aaa5a60STom Warren		status = "disabled";
154*7aaa5a60STom Warren	};
155*7aaa5a60STom Warren
156*7aaa5a60STom Warren	spi@0,7000d400 {
157*7aaa5a60STom Warren		compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
158*7aaa5a60STom Warren		reg = <0x0 0x7000d400 0x0 0x200>;
159*7aaa5a60STom Warren		interrupts = <0 59 0x04>;
160*7aaa5a60STom Warren		#address-cells = <1>;
161*7aaa5a60STom Warren		#size-cells = <0>;
162*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SBC1>;
163*7aaa5a60STom Warren		resets = <&tegra_car 41>;
164*7aaa5a60STom Warren		reset-names = "spi";
165*7aaa5a60STom Warren		status = "disabled";
166*7aaa5a60STom Warren	};
167*7aaa5a60STom Warren
168*7aaa5a60STom Warren	spi@0,7000d600 {
169*7aaa5a60STom Warren		compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
170*7aaa5a60STom Warren		reg = <0x0 0x7000d600 0x0 0x200>;
171*7aaa5a60STom Warren		interrupts = <0 82 0x04>;
172*7aaa5a60STom Warren		#address-cells = <1>;
173*7aaa5a60STom Warren		#size-cells = <0>;
174*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SBC2>;
175*7aaa5a60STom Warren		resets = <&tegra_car 44>;
176*7aaa5a60STom Warren		reset-names = "spi";
177*7aaa5a60STom Warren		status = "disabled";
178*7aaa5a60STom Warren	};
179*7aaa5a60STom Warren
180*7aaa5a60STom Warren	spi@0,7000d800 {
181*7aaa5a60STom Warren		compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
182*7aaa5a60STom Warren		reg = <0x0 0x7000d800 0x0 0x200>;
183*7aaa5a60STom Warren		interrupts = <0 83 0x04>;
184*7aaa5a60STom Warren		#address-cells = <1>;
185*7aaa5a60STom Warren		#size-cells = <0>;
186*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SBC3>;
187*7aaa5a60STom Warren		resets = <&tegra_car 46>;
188*7aaa5a60STom Warren		reset-names = "spi";
189*7aaa5a60STom Warren		status = "disabled";
190*7aaa5a60STom Warren	};
191*7aaa5a60STom Warren
192*7aaa5a60STom Warren	spi@0,7000da00 {
193*7aaa5a60STom Warren		compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
194*7aaa5a60STom Warren		reg = <0x0 0x7000da00 0x0 0x200>;
195*7aaa5a60STom Warren		interrupts = <0 93 0x04>;
196*7aaa5a60STom Warren		#address-cells = <1>;
197*7aaa5a60STom Warren		#size-cells = <0>;
198*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SBC4>;
199*7aaa5a60STom Warren		resets = <&tegra_car 68>;
200*7aaa5a60STom Warren		reset-names = "spi";
201*7aaa5a60STom Warren		status = "disabled";
202*7aaa5a60STom Warren	};
203*7aaa5a60STom Warren
204*7aaa5a60STom Warren	spi@0,70410000 {
205*7aaa5a60STom Warren		compatible = "nvidia,tegra210-qspi";
206*7aaa5a60STom Warren		reg = <0x0 0x70410000 0x0 0x1000>;
207*7aaa5a60STom Warren		interrupts = <0 10 0x04>;
208*7aaa5a60STom Warren		#address-cells = <1>;
209*7aaa5a60STom Warren		#size-cells = <0>;
210*7aaa5a60STom Warren		clocks = <&tegra_car 211>;
211*7aaa5a60STom Warren		status = "disabled";
212*7aaa5a60STom Warren	};
213*7aaa5a60STom Warren
214*7aaa5a60STom Warren	padctl: padctl@0,7009f000 {
215*7aaa5a60STom Warren		compatible = "nvidia,tegra210-xusb-padctl";
216*7aaa5a60STom Warren		reg = <0x0 0x7009f000 0x0 0x1000>;
217*7aaa5a60STom Warren		resets = <&tegra_car 142>;
218*7aaa5a60STom Warren		reset-names = "padctl";
219*7aaa5a60STom Warren		#phy-cells = <1>;
220*7aaa5a60STom Warren	};
221*7aaa5a60STom Warren
222*7aaa5a60STom Warren	sdhci@0,700b0000 {
223*7aaa5a60STom Warren		compatible = "nvidia,tegra210-sdhci";
224*7aaa5a60STom Warren		reg = <0x0 0x700b0000 0x0 0x200>;
225*7aaa5a60STom Warren		interrupts = <0 14 0x04>;
226*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
227*7aaa5a60STom Warren		resets = <&tegra_car 14>;
228*7aaa5a60STom Warren		reset-names = "sdhci";
229*7aaa5a60STom Warren		status = "disabled";
230*7aaa5a60STom Warren	};
231*7aaa5a60STom Warren
232*7aaa5a60STom Warren	sdhci@0,700b0200 {
233*7aaa5a60STom Warren		compatible = "nvidia,tegra210-sdhci";
234*7aaa5a60STom Warren		reg = <0x0 0x700b0200 0x0 0x200>;
235*7aaa5a60STom Warren		interrupts = <0 15 0x04>;
236*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
237*7aaa5a60STom Warren		resets = <&tegra_car 9>;
238*7aaa5a60STom Warren		reset-names = "sdhci";
239*7aaa5a60STom Warren		status = "disabled";
240*7aaa5a60STom Warren	};
241*7aaa5a60STom Warren
242*7aaa5a60STom Warren	sdhci@0,700b0400 {
243*7aaa5a60STom Warren		compatible = "nvidia,tegra210-sdhci";
244*7aaa5a60STom Warren		reg = <0x0 0x700b0400 0x0 0x200>;
245*7aaa5a60STom Warren		interrupts = <0 19 0x04>;
246*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
247*7aaa5a60STom Warren		resets = <&tegra_car 69>;
248*7aaa5a60STom Warren		reset-names = "sdhci";
249*7aaa5a60STom Warren		status = "disabled";
250*7aaa5a60STom Warren	};
251*7aaa5a60STom Warren
252*7aaa5a60STom Warren	sdhci@0,700b0600 {
253*7aaa5a60STom Warren		compatible = "nvidia,tegra210-sdhci";
254*7aaa5a60STom Warren		reg = <0x0 0x700b0600 0x0 0x200>;
255*7aaa5a60STom Warren		interrupts = <0 31 0x04>;
256*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
257*7aaa5a60STom Warren		resets = <&tegra_car 15>;
258*7aaa5a60STom Warren		reset-names = "sdhci";
259*7aaa5a60STom Warren		status = "disabled";
260*7aaa5a60STom Warren	};
261*7aaa5a60STom Warren
262*7aaa5a60STom Warren	usb@0,7d000000 {
263*7aaa5a60STom Warren		compatible = "nvidia,tegra210-ehci";
264*7aaa5a60STom Warren		reg = <0x0 0x7d000000 0x0 0x4000>;
265*7aaa5a60STom Warren		interrupts = <0 20 0x04>;
266*7aaa5a60STom Warren		phy_type = "utmi";
267*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_USBD>;
268*7aaa5a60STom Warren		resets = <&tegra_car 22>;
269*7aaa5a60STom Warren		reset-names = "usb";
270*7aaa5a60STom Warren		status = "disabled";
271*7aaa5a60STom Warren	};
272*7aaa5a60STom Warren
273*7aaa5a60STom Warren	usb@0,7d004000 {
274*7aaa5a60STom Warren		compatible = "nvidia,tegra210-ehci";
275*7aaa5a60STom Warren		reg = <0x0 0x7d004000 0x0 0x4000>;
276*7aaa5a60STom Warren		interrupts = < 53 >;
277*7aaa5a60STom Warren		phy_type = "utmi";
278*7aaa5a60STom Warren		clocks = <&tegra_car TEGRA210_CLK_USB2>;
279*7aaa5a60STom Warren		resets = <&tegra_car 58>;
280*7aaa5a60STom Warren		reset-names = "usb";
281*7aaa5a60STom Warren		status = "disabled";
282*7aaa5a60STom Warren	};
283*7aaa5a60STom Warren};
284