1c3474ef3SSimon Glass/include/ "skeleton.dtsi" 2c3474ef3SSimon Glass 3c3474ef3SSimon Glass/ { 4c3474ef3SSimon Glass compatible = "nvidia,tegra20"; 5c3474ef3SSimon Glass interrupt-parent = <&intc>; 6c3474ef3SSimon Glass 71f1a0212SSimon Glass tegra_car: clock@60006000 { 81f1a0212SSimon Glass compatible = "nvidia,tegra20-car"; 91f1a0212SSimon Glass reg = <0x60006000 0x1000>; 101f1a0212SSimon Glass #clock-cells = <1>; 111f1a0212SSimon Glass }; 121f1a0212SSimon Glass 131f1a0212SSimon Glass clocks { 141f1a0212SSimon Glass #address-cells = <1>; 151f1a0212SSimon Glass #size-cells = <0>; 161f1a0212SSimon Glass 171f1a0212SSimon Glass osc: clock { 181f1a0212SSimon Glass compatible = "fixed-clock"; 191f1a0212SSimon Glass #clock-cells = <0>; 201f1a0212SSimon Glass }; 211f1a0212SSimon Glass }; 221f1a0212SSimon Glass 23c3474ef3SSimon Glass intc: interrupt-controller@50041000 { 24c3474ef3SSimon Glass compatible = "nvidia,tegra20-gic"; 25c3474ef3SSimon Glass interrupt-controller; 26c3474ef3SSimon Glass #interrupt-cells = <1>; 27c3474ef3SSimon Glass reg = < 0x50041000 0x1000 >, 28c3474ef3SSimon Glass < 0x50040100 0x0100 >; 29c3474ef3SSimon Glass }; 30c3474ef3SSimon Glass 31c3474ef3SSimon Glass i2c@7000c000 { 32c3474ef3SSimon Glass #address-cells = <1>; 33c3474ef3SSimon Glass #size-cells = <0>; 34c3474ef3SSimon Glass compatible = "nvidia,tegra20-i2c"; 35c3474ef3SSimon Glass reg = <0x7000C000 0x100>; 36c3474ef3SSimon Glass interrupts = < 70 >; 37c3474ef3SSimon Glass }; 38c3474ef3SSimon Glass 39c3474ef3SSimon Glass i2c@7000c400 { 40c3474ef3SSimon Glass #address-cells = <1>; 41c3474ef3SSimon Glass #size-cells = <0>; 42c3474ef3SSimon Glass compatible = "nvidia,tegra20-i2c"; 43c3474ef3SSimon Glass reg = <0x7000C400 0x100>; 44c3474ef3SSimon Glass interrupts = < 116 >; 45c3474ef3SSimon Glass }; 46c3474ef3SSimon Glass 47c3474ef3SSimon Glass i2c@7000c500 { 48c3474ef3SSimon Glass #address-cells = <1>; 49c3474ef3SSimon Glass #size-cells = <0>; 50c3474ef3SSimon Glass compatible = "nvidia,tegra20-i2c"; 51c3474ef3SSimon Glass reg = <0x7000C500 0x100>; 52c3474ef3SSimon Glass interrupts = < 124 >; 53c3474ef3SSimon Glass }; 54c3474ef3SSimon Glass 55c3474ef3SSimon Glass i2c@7000d000 { 56c3474ef3SSimon Glass #address-cells = <1>; 57c3474ef3SSimon Glass #size-cells = <0>; 58c3474ef3SSimon Glass compatible = "nvidia,tegra20-i2c"; 59c3474ef3SSimon Glass reg = <0x7000D000 0x200>; 60c3474ef3SSimon Glass interrupts = < 85 >; 61c3474ef3SSimon Glass }; 62c3474ef3SSimon Glass 63c3474ef3SSimon Glass i2s@70002800 { 64c3474ef3SSimon Glass #address-cells = <1>; 65c3474ef3SSimon Glass #size-cells = <0>; 66c3474ef3SSimon Glass compatible = "nvidia,tegra20-i2s"; 67c3474ef3SSimon Glass reg = <0x70002800 0x200>; 68c3474ef3SSimon Glass interrupts = < 45 >; 69c3474ef3SSimon Glass dma-channel = < 2 >; 70c3474ef3SSimon Glass }; 71c3474ef3SSimon Glass 72c3474ef3SSimon Glass i2s@70002a00 { 73c3474ef3SSimon Glass #address-cells = <1>; 74c3474ef3SSimon Glass #size-cells = <0>; 75c3474ef3SSimon Glass compatible = "nvidia,tegra20-i2s"; 76c3474ef3SSimon Glass reg = <0x70002a00 0x200>; 77c3474ef3SSimon Glass interrupts = < 35 >; 78c3474ef3SSimon Glass dma-channel = < 1 >; 79c3474ef3SSimon Glass }; 80c3474ef3SSimon Glass 81c3474ef3SSimon Glass das@70000c00 { 82c3474ef3SSimon Glass #address-cells = <1>; 83c3474ef3SSimon Glass #size-cells = <0>; 84c3474ef3SSimon Glass compatible = "nvidia,tegra20-das"; 85c3474ef3SSimon Glass reg = <0x70000c00 0x80>; 86c3474ef3SSimon Glass }; 87c3474ef3SSimon Glass 88c3474ef3SSimon Glass gpio: gpio@6000d000 { 89c3474ef3SSimon Glass compatible = "nvidia,tegra20-gpio"; 90c3474ef3SSimon Glass reg = < 0x6000d000 0x1000 >; 91c3474ef3SSimon Glass interrupts = < 64 65 66 67 87 119 121 >; 92c3474ef3SSimon Glass #gpio-cells = <2>; 93c3474ef3SSimon Glass gpio-controller; 94c3474ef3SSimon Glass }; 95c3474ef3SSimon Glass 96c3474ef3SSimon Glass pinmux: pinmux@70000000 { 97c3474ef3SSimon Glass compatible = "nvidia,tegra20-pinmux"; 98c3474ef3SSimon Glass reg = < 0x70000014 0x10 /* Tri-state registers */ 99c3474ef3SSimon Glass 0x70000080 0x20 /* Mux registers */ 100c3474ef3SSimon Glass 0x700000a0 0x14 /* Pull-up/down registers */ 101c3474ef3SSimon Glass 0x70000868 0xa8 >; /* Pad control registers */ 102c3474ef3SSimon Glass }; 103c3474ef3SSimon Glass 104c3474ef3SSimon Glass serial@70006000 { 105c3474ef3SSimon Glass compatible = "nvidia,tegra20-uart"; 106c3474ef3SSimon Glass reg = <0x70006000 0x40>; 107c3474ef3SSimon Glass reg-shift = <2>; 108c3474ef3SSimon Glass interrupts = < 68 >; 109c3474ef3SSimon Glass }; 110c3474ef3SSimon Glass 111c3474ef3SSimon Glass serial@70006040 { 112c3474ef3SSimon Glass compatible = "nvidia,tegra20-uart"; 113c3474ef3SSimon Glass reg = <0x70006040 0x40>; 114c3474ef3SSimon Glass reg-shift = <2>; 115c3474ef3SSimon Glass interrupts = < 69 >; 116c3474ef3SSimon Glass }; 117c3474ef3SSimon Glass 118c3474ef3SSimon Glass serial@70006200 { 119c3474ef3SSimon Glass compatible = "nvidia,tegra20-uart"; 120c3474ef3SSimon Glass reg = <0x70006200 0x100>; 121c3474ef3SSimon Glass reg-shift = <2>; 122c3474ef3SSimon Glass interrupts = < 78 >; 123c3474ef3SSimon Glass }; 124c3474ef3SSimon Glass 125c3474ef3SSimon Glass serial@70006300 { 126c3474ef3SSimon Glass compatible = "nvidia,tegra20-uart"; 127c3474ef3SSimon Glass reg = <0x70006300 0x100>; 128c3474ef3SSimon Glass reg-shift = <2>; 129c3474ef3SSimon Glass interrupts = < 122 >; 130c3474ef3SSimon Glass }; 131c3474ef3SSimon Glass 132c3474ef3SSimon Glass serial@70006400 { 133c3474ef3SSimon Glass compatible = "nvidia,tegra20-uart"; 134c3474ef3SSimon Glass reg = <0x70006400 0x100>; 135c3474ef3SSimon Glass reg-shift = <2>; 136c3474ef3SSimon Glass interrupts = < 123 >; 137c3474ef3SSimon Glass }; 138c3474ef3SSimon Glass 139c3474ef3SSimon Glass sdhci@c8000000 { 140c3474ef3SSimon Glass compatible = "nvidia,tegra20-sdhci"; 141c3474ef3SSimon Glass reg = <0xc8000000 0x200>; 142c3474ef3SSimon Glass interrupts = < 46 >; 143c3474ef3SSimon Glass }; 144c3474ef3SSimon Glass 145c3474ef3SSimon Glass sdhci@c8000200 { 146c3474ef3SSimon Glass compatible = "nvidia,tegra20-sdhci"; 147c3474ef3SSimon Glass reg = <0xc8000200 0x200>; 148c3474ef3SSimon Glass interrupts = < 47 >; 149c3474ef3SSimon Glass }; 150c3474ef3SSimon Glass 151c3474ef3SSimon Glass sdhci@c8000400 { 152c3474ef3SSimon Glass compatible = "nvidia,tegra20-sdhci"; 153c3474ef3SSimon Glass reg = <0xc8000400 0x200>; 154c3474ef3SSimon Glass interrupts = < 51 >; 155c3474ef3SSimon Glass }; 156c3474ef3SSimon Glass 157c3474ef3SSimon Glass sdhci@c8000600 { 158c3474ef3SSimon Glass compatible = "nvidia,tegra20-sdhci"; 159c3474ef3SSimon Glass reg = <0xc8000600 0x200>; 160c3474ef3SSimon Glass interrupts = < 63 >; 161c3474ef3SSimon Glass }; 162c3474ef3SSimon Glass 163c3474ef3SSimon Glass usb@c5000000 { 164c3474ef3SSimon Glass compatible = "nvidia,tegra20-ehci", "usb-ehci"; 165c3474ef3SSimon Glass reg = <0xc5000000 0x4000>; 166c3474ef3SSimon Glass interrupts = < 52 >; 167c3474ef3SSimon Glass phy_type = "utmi"; 168*1c1cce99SSimon Glass clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */ 169*1c1cce99SSimon Glass nvidia,has-legacy-mode; 170c3474ef3SSimon Glass }; 171c3474ef3SSimon Glass 172c3474ef3SSimon Glass usb@c5004000 { 173c3474ef3SSimon Glass compatible = "nvidia,tegra20-ehci", "usb-ehci"; 174c3474ef3SSimon Glass reg = <0xc5004000 0x4000>; 175c3474ef3SSimon Glass interrupts = < 53 >; 176c3474ef3SSimon Glass phy_type = "ulpi"; 177*1c1cce99SSimon Glass clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */ 178c3474ef3SSimon Glass }; 179c3474ef3SSimon Glass 180c3474ef3SSimon Glass usb@c5008000 { 181c3474ef3SSimon Glass compatible = "nvidia,tegra20-ehci", "usb-ehci"; 182c3474ef3SSimon Glass reg = <0xc5008000 0x4000>; 183c3474ef3SSimon Glass interrupts = < 129 >; 184c3474ef3SSimon Glass phy_type = "utmi"; 185*1c1cce99SSimon Glass clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */ 186c3474ef3SSimon Glass }; 187c3474ef3SSimon Glass 188c3474ef3SSimon Glass}; 189