xref: /rk3399_rockchip-uboot/arch/arm/dts/tegra114.dtsi (revision 6a3742fe7abfe4b5f4e942a579c0eceaa5a5ed15)
16c5be646STom Warren#include "skeleton.dtsi"
28aff0095STom Warren
38aff0095STom Warren/ {
48aff0095STom Warren	compatible = "nvidia,tegra114";
5b77c3547STom Warren
619a970afSTom Warren	tegra_car: clock {
7b77c3547STom Warren		compatible = "nvidia,tegra114-car";
8b77c3547STom Warren		reg = <0x60006000 0x1000>;
9b77c3547STom Warren		#clock-cells = <1>;
10b77c3547STom Warren	};
11b77c3547STom Warren
12*6a3742feSAllen Martin	apbdma: dma {
13*6a3742feSAllen Martin		compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
14*6a3742feSAllen Martin		reg = <0x6000a000 0x1400>;
15*6a3742feSAllen Martin		interrupts = <0 104 0x04
16*6a3742feSAllen Martin			      0 105 0x04
17*6a3742feSAllen Martin			      0 106 0x04
18*6a3742feSAllen Martin			      0 107 0x04
19*6a3742feSAllen Martin			      0 108 0x04
20*6a3742feSAllen Martin			      0 109 0x04
21*6a3742feSAllen Martin			      0 110 0x04
22*6a3742feSAllen Martin			      0 111 0x04
23*6a3742feSAllen Martin			      0 112 0x04
24*6a3742feSAllen Martin			      0 113 0x04
25*6a3742feSAllen Martin			      0 114 0x04
26*6a3742feSAllen Martin			      0 115 0x04
27*6a3742feSAllen Martin			      0 116 0x04
28*6a3742feSAllen Martin			      0 117 0x04
29*6a3742feSAllen Martin			      0 118 0x04
30*6a3742feSAllen Martin			      0 119 0x04
31*6a3742feSAllen Martin			      0 128 0x04
32*6a3742feSAllen Martin			      0 129 0x04
33*6a3742feSAllen Martin			      0 130 0x04
34*6a3742feSAllen Martin			      0 131 0x04
35*6a3742feSAllen Martin			      0 132 0x04
36*6a3742feSAllen Martin			      0 133 0x04
37*6a3742feSAllen Martin			      0 134 0x04
38*6a3742feSAllen Martin			      0 135 0x04
39*6a3742feSAllen Martin			      0 136 0x04
40*6a3742feSAllen Martin			      0 137 0x04
41*6a3742feSAllen Martin			      0 138 0x04
42*6a3742feSAllen Martin			      0 139 0x04
43*6a3742feSAllen Martin			      0 140 0x04
44*6a3742feSAllen Martin			      0 141 0x04
45*6a3742feSAllen Martin			      0 142 0x04
46*6a3742feSAllen Martin			      0 143 0x04>;
47*6a3742feSAllen Martin	};
48*6a3742feSAllen Martin
4919a970afSTom Warren	gpio: gpio {
5019a970afSTom Warren		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
5119a970afSTom Warren		reg = <0x6000d000 0x1000>;
5219a970afSTom Warren		interrupts = <0 32 0x04
5319a970afSTom Warren			      0 33 0x04
5419a970afSTom Warren			      0 34 0x04
5519a970afSTom Warren			      0 35 0x04
5619a970afSTom Warren			      0 55 0x04
5719a970afSTom Warren			      0 87 0x04
5819a970afSTom Warren			      0 89 0x04
5919a970afSTom Warren			      0 125 0x04>;
6019a970afSTom Warren		#gpio-cells = <2>;
6119a970afSTom Warren		gpio-controller;
6219a970afSTom Warren		#interrupt-cells = <2>;
6319a970afSTom Warren		interrupt-controller;
6419a970afSTom Warren	};
6519a970afSTom Warren
66b77c3547STom Warren	i2c@7000c000 {
67b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
68b77c3547STom Warren		reg = <0x7000c000 0x100>;
69b77c3547STom Warren		interrupts = <0 38 0x04>;
70b77c3547STom Warren		#address-cells = <1>;
71b77c3547STom Warren		#size-cells = <0>;
72b77c3547STom Warren		clocks = <&tegra_car 12>;
73b77c3547STom Warren		status = "disabled";
74b77c3547STom Warren	};
75b77c3547STom Warren
76b77c3547STom Warren	i2c@7000c400 {
77b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
78b77c3547STom Warren		reg = <0x7000c400 0x100>;
79b77c3547STom Warren		interrupts = <0 84 0x04>;
80b77c3547STom Warren		#address-cells = <1>;
81b77c3547STom Warren		#size-cells = <0>;
82b77c3547STom Warren		clocks = <&tegra_car 54>;
83b77c3547STom Warren		status = "disabled";
84b77c3547STom Warren	};
85b77c3547STom Warren
86b77c3547STom Warren	i2c@7000c500 {
87b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
88b77c3547STom Warren		reg = <0x7000c500 0x100>;
89b77c3547STom Warren		interrupts = <0 92 0x04>;
90b77c3547STom Warren		#address-cells = <1>;
91b77c3547STom Warren		#size-cells = <0>;
92b77c3547STom Warren		clocks = <&tegra_car 67>;
93b77c3547STom Warren		status = "disabled";
94b77c3547STom Warren	};
95b77c3547STom Warren
96b77c3547STom Warren	i2c@7000c700 {
97b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
98b77c3547STom Warren		reg = <0x7000c700 0x100>;
99b77c3547STom Warren		interrupts = <0 120 0x04>;
100b77c3547STom Warren		#address-cells = <1>;
101b77c3547STom Warren		#size-cells = <0>;
102b77c3547STom Warren		clocks = <&tegra_car 103>;
103b77c3547STom Warren		status = "disabled";
104b77c3547STom Warren	};
105b77c3547STom Warren
106b77c3547STom Warren	i2c@7000d000 {
107b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
108b77c3547STom Warren		reg = <0x7000d000 0x100>;
109b77c3547STom Warren		interrupts = <0 53 0x04>;
110b77c3547STom Warren		#address-cells = <1>;
111b77c3547STom Warren		#size-cells = <0>;
112b77c3547STom Warren		clocks = <&tegra_car 47>;
113b77c3547STom Warren		status = "disabled";
114b77c3547STom Warren	};
1158aff0095STom Warren};
116