xref: /rk3399_rockchip-uboot/arch/arm/dts/tegra114.dtsi (revision 49941b22ec99f9ef8ee6673f61e06e8fde239e97)
16c5be646STom Warren#include "skeleton.dtsi"
28aff0095STom Warren
38aff0095STom Warren/ {
48aff0095STom Warren	compatible = "nvidia,tegra114";
5b77c3547STom Warren
619a970afSTom Warren	tegra_car: clock {
7b77c3547STom Warren		compatible = "nvidia,tegra114-car";
8b77c3547STom Warren		reg = <0x60006000 0x1000>;
9b77c3547STom Warren		#clock-cells = <1>;
10b77c3547STom Warren	};
11b77c3547STom Warren
126a3742feSAllen Martin	apbdma: dma {
136a3742feSAllen Martin		compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
146a3742feSAllen Martin		reg = <0x6000a000 0x1400>;
156a3742feSAllen Martin		interrupts = <0 104 0x04
166a3742feSAllen Martin			      0 105 0x04
176a3742feSAllen Martin			      0 106 0x04
186a3742feSAllen Martin			      0 107 0x04
196a3742feSAllen Martin			      0 108 0x04
206a3742feSAllen Martin			      0 109 0x04
216a3742feSAllen Martin			      0 110 0x04
226a3742feSAllen Martin			      0 111 0x04
236a3742feSAllen Martin			      0 112 0x04
246a3742feSAllen Martin			      0 113 0x04
256a3742feSAllen Martin			      0 114 0x04
266a3742feSAllen Martin			      0 115 0x04
276a3742feSAllen Martin			      0 116 0x04
286a3742feSAllen Martin			      0 117 0x04
296a3742feSAllen Martin			      0 118 0x04
306a3742feSAllen Martin			      0 119 0x04
316a3742feSAllen Martin			      0 128 0x04
326a3742feSAllen Martin			      0 129 0x04
336a3742feSAllen Martin			      0 130 0x04
346a3742feSAllen Martin			      0 131 0x04
356a3742feSAllen Martin			      0 132 0x04
366a3742feSAllen Martin			      0 133 0x04
376a3742feSAllen Martin			      0 134 0x04
386a3742feSAllen Martin			      0 135 0x04
396a3742feSAllen Martin			      0 136 0x04
406a3742feSAllen Martin			      0 137 0x04
416a3742feSAllen Martin			      0 138 0x04
426a3742feSAllen Martin			      0 139 0x04
436a3742feSAllen Martin			      0 140 0x04
446a3742feSAllen Martin			      0 141 0x04
456a3742feSAllen Martin			      0 142 0x04
466a3742feSAllen Martin			      0 143 0x04>;
476a3742feSAllen Martin	};
486a3742feSAllen Martin
4919a970afSTom Warren	gpio: gpio {
5019a970afSTom Warren		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
5119a970afSTom Warren		reg = <0x6000d000 0x1000>;
5219a970afSTom Warren		interrupts = <0 32 0x04
5319a970afSTom Warren			      0 33 0x04
5419a970afSTom Warren			      0 34 0x04
5519a970afSTom Warren			      0 35 0x04
5619a970afSTom Warren			      0 55 0x04
5719a970afSTom Warren			      0 87 0x04
5819a970afSTom Warren			      0 89 0x04
5919a970afSTom Warren			      0 125 0x04>;
6019a970afSTom Warren		#gpio-cells = <2>;
6119a970afSTom Warren		gpio-controller;
6219a970afSTom Warren		#interrupt-cells = <2>;
6319a970afSTom Warren		interrupt-controller;
6419a970afSTom Warren	};
6519a970afSTom Warren
66b77c3547STom Warren	i2c@7000c000 {
67b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
68b77c3547STom Warren		reg = <0x7000c000 0x100>;
69b77c3547STom Warren		interrupts = <0 38 0x04>;
70b77c3547STom Warren		#address-cells = <1>;
71b77c3547STom Warren		#size-cells = <0>;
72b77c3547STom Warren		clocks = <&tegra_car 12>;
73b77c3547STom Warren		status = "disabled";
74b77c3547STom Warren	};
75b77c3547STom Warren
76b77c3547STom Warren	i2c@7000c400 {
77b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
78b77c3547STom Warren		reg = <0x7000c400 0x100>;
79b77c3547STom Warren		interrupts = <0 84 0x04>;
80b77c3547STom Warren		#address-cells = <1>;
81b77c3547STom Warren		#size-cells = <0>;
82b77c3547STom Warren		clocks = <&tegra_car 54>;
83b77c3547STom Warren		status = "disabled";
84b77c3547STom Warren	};
85b77c3547STom Warren
86b77c3547STom Warren	i2c@7000c500 {
87b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
88b77c3547STom Warren		reg = <0x7000c500 0x100>;
89b77c3547STom Warren		interrupts = <0 92 0x04>;
90b77c3547STom Warren		#address-cells = <1>;
91b77c3547STom Warren		#size-cells = <0>;
92b77c3547STom Warren		clocks = <&tegra_car 67>;
93b77c3547STom Warren		status = "disabled";
94b77c3547STom Warren	};
95b77c3547STom Warren
96b77c3547STom Warren	i2c@7000c700 {
97b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
98b77c3547STom Warren		reg = <0x7000c700 0x100>;
99b77c3547STom Warren		interrupts = <0 120 0x04>;
100b77c3547STom Warren		#address-cells = <1>;
101b77c3547STom Warren		#size-cells = <0>;
102b77c3547STom Warren		clocks = <&tegra_car 103>;
103b77c3547STom Warren		status = "disabled";
104b77c3547STom Warren	};
105b77c3547STom Warren
106b77c3547STom Warren	i2c@7000d000 {
107b77c3547STom Warren		compatible = "nvidia,tegra114-i2c";
108b77c3547STom Warren		reg = <0x7000d000 0x100>;
109b77c3547STom Warren		interrupts = <0 53 0x04>;
110b77c3547STom Warren		#address-cells = <1>;
111b77c3547STom Warren		#size-cells = <0>;
112b77c3547STom Warren		clocks = <&tegra_car 47>;
113b77c3547STom Warren		status = "disabled";
114b77c3547STom Warren	};
1159a38fb4dSAllen Martin
1169a38fb4dSAllen Martin	spi@7000d400 {
1179a38fb4dSAllen Martin		compatible = "nvidia,tegra114-spi";
1189a38fb4dSAllen Martin		reg = <0x7000d400 0x200>;
1199a38fb4dSAllen Martin		interrupts = <0 59 0x04>;
1209a38fb4dSAllen Martin		nvidia,dma-request-selector = <&apbdma 15>;
1219a38fb4dSAllen Martin		#address-cells = <1>;
1229a38fb4dSAllen Martin		#size-cells = <0>;
1239a38fb4dSAllen Martin		status = "disabled";
1249a38fb4dSAllen Martin		/* PERIPH_ID_SBC1, PLLP_OUT0 */
1259a38fb4dSAllen Martin		clocks = <&tegra_car 41>;
1269a38fb4dSAllen Martin	};
1279a38fb4dSAllen Martin
1289a38fb4dSAllen Martin	spi@7000d600 {
1299a38fb4dSAllen Martin		compatible = "nvidia,tegra114-spi";
1309a38fb4dSAllen Martin		reg = <0x7000d600 0x200>;
1319a38fb4dSAllen Martin		interrupts = <0 82 0x04>;
1329a38fb4dSAllen Martin		nvidia,dma-request-selector = <&apbdma 16>;
1339a38fb4dSAllen Martin		#address-cells = <1>;
1349a38fb4dSAllen Martin		#size-cells = <0>;
1359a38fb4dSAllen Martin		status = "disabled";
1369a38fb4dSAllen Martin		/* PERIPH_ID_SBC2, PLLP_OUT0 */
1379a38fb4dSAllen Martin		clocks = <&tegra_car 44>;
1389a38fb4dSAllen Martin	};
1399a38fb4dSAllen Martin
1409a38fb4dSAllen Martin	spi@7000d800 {
1419a38fb4dSAllen Martin		compatible = "nvidia,tegra114-spi";
142*49941b22SStephen Warren		reg = <0x7000d800 0x200>;
1439a38fb4dSAllen Martin		interrupts = <0 83 0x04>;
1449a38fb4dSAllen Martin		nvidia,dma-request-selector = <&apbdma 17>;
1459a38fb4dSAllen Martin		#address-cells = <1>;
1469a38fb4dSAllen Martin		#size-cells = <0>;
1479a38fb4dSAllen Martin		status = "disabled";
1489a38fb4dSAllen Martin		/* PERIPH_ID_SBC3, PLLP_OUT0 */
1499a38fb4dSAllen Martin		clocks = <&tegra_car 46>;
1509a38fb4dSAllen Martin	};
1519a38fb4dSAllen Martin
1529a38fb4dSAllen Martin	spi@7000da00 {
1539a38fb4dSAllen Martin		compatible = "nvidia,tegra114-spi";
1549a38fb4dSAllen Martin		reg = <0x7000da00 0x200>;
1559a38fb4dSAllen Martin		interrupts = <0 93 0x04>;
1569a38fb4dSAllen Martin		nvidia,dma-request-selector = <&apbdma 18>;
1579a38fb4dSAllen Martin		#address-cells = <1>;
1589a38fb4dSAllen Martin		#size-cells = <0>;
1599a38fb4dSAllen Martin		status = "disabled";
1609a38fb4dSAllen Martin		/* PERIPH_ID_SBC4, PLLP_OUT0 */
1619a38fb4dSAllen Martin		clocks = <&tegra_car 68>;
1629a38fb4dSAllen Martin	};
1639a38fb4dSAllen Martin
1649a38fb4dSAllen Martin	spi@7000dc00 {
1659a38fb4dSAllen Martin		compatible = "nvidia,tegra114-spi";
1669a38fb4dSAllen Martin		reg = <0x7000dc00 0x200>;
1679a38fb4dSAllen Martin		interrupts = <0 94 0x04>;
1689a38fb4dSAllen Martin		nvidia,dma-request-selector = <&apbdma 27>;
1699a38fb4dSAllen Martin		#address-cells = <1>;
1709a38fb4dSAllen Martin		#size-cells = <0>;
1719a38fb4dSAllen Martin		status = "disabled";
1729a38fb4dSAllen Martin		/* PERIPH_ID_SBC5, PLLP_OUT0 */
1739a38fb4dSAllen Martin		clocks = <&tegra_car 104>;
1749a38fb4dSAllen Martin	};
1759a38fb4dSAllen Martin
1769a38fb4dSAllen Martin	spi@7000de00 {
1779a38fb4dSAllen Martin		compatible = "nvidia,tegra114-spi";
1789a38fb4dSAllen Martin		reg = <0x7000de00 0x200>;
1799a38fb4dSAllen Martin		interrupts = <0 79 0x04>;
1809a38fb4dSAllen Martin		nvidia,dma-request-selector = <&apbdma 28>;
1819a38fb4dSAllen Martin		#address-cells = <1>;
1829a38fb4dSAllen Martin		#size-cells = <0>;
1839a38fb4dSAllen Martin		status = "disabled";
1849a38fb4dSAllen Martin		/* PERIPH_ID_SBC6, PLLP_OUT0 */
1859a38fb4dSAllen Martin		clocks = <&tegra_car 105>;
1869a38fb4dSAllen Martin	};
187e9cd2065STom Warren
188e9cd2065STom Warren	sdhci@78000000 {
189e9cd2065STom Warren		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
190e9cd2065STom Warren		reg = <0x78000000 0x200>;
191e9cd2065STom Warren		interrupts = <0 14 0x04>;
192e9cd2065STom Warren		clocks = <&tegra_car 14>;
193e9cd2065STom Warren		status = "disable";
194e9cd2065STom Warren	};
195e9cd2065STom Warren
196e9cd2065STom Warren	sdhci@78000200 {
197e9cd2065STom Warren		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
198e9cd2065STom Warren		reg = <0x78000200 0x200>;
199e9cd2065STom Warren		interrupts = <0 15 0x04>;
200e9cd2065STom Warren		clocks = <&tegra_car 9>;
201e9cd2065STom Warren		status = "disable";
202e9cd2065STom Warren	};
203e9cd2065STom Warren
204e9cd2065STom Warren	sdhci@78000400 {
205e9cd2065STom Warren		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
206e9cd2065STom Warren		reg = <0x78000400 0x200>;
207e9cd2065STom Warren		interrupts = <0 19 0x04>;
208e9cd2065STom Warren		clocks = <&tegra_car 69>;
209e9cd2065STom Warren		status = "disable";
210e9cd2065STom Warren	};
211e9cd2065STom Warren
212e9cd2065STom Warren	sdhci@78000600 {
213e9cd2065STom Warren		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
214e9cd2065STom Warren		reg = <0x78000600 0x200>;
215e9cd2065STom Warren		interrupts = <0 31 0x04>;
216e9cd2065STom Warren		clocks = <&tegra_car 15>;
217e9cd2065STom Warren		status = "disable";
218e9cd2065STom Warren	};
21956867d88SJim Lin
22056867d88SJim Lin	usb@7d000000 {
22156867d88SJim Lin		compatible = "nvidia,tegra114-ehci";
22256867d88SJim Lin		reg = <0x7d000000 0x4000>;
22356867d88SJim Lin		interrupts = <52>;
22456867d88SJim Lin		phy_type = "utmi";
22556867d88SJim Lin		clocks = <&tegra_car 22>;	/* PERIPH_ID_USBD */
22656867d88SJim Lin		status = "disabled";
22756867d88SJim Lin	};
22856867d88SJim Lin
22956867d88SJim Lin	usb@7d004000 {
23056867d88SJim Lin		compatible = "nvidia,tegra114-ehci";
23156867d88SJim Lin		reg = <0x7d004000 0x4000>;
23256867d88SJim Lin		interrupts = <53>;
23356867d88SJim Lin		phy_type = "hsic";
23456867d88SJim Lin		clocks = <&tegra_car 58>;	/* PERIPH_ID_USB2 */
23556867d88SJim Lin		status = "disabled";
23656867d88SJim Lin	};
23756867d88SJim Lin
23856867d88SJim Lin	usb@7d008000 {
23956867d88SJim Lin		compatible = "nvidia,tegra114-ehci";
24056867d88SJim Lin		reg = <0x7d008000 0x4000>;
24156867d88SJim Lin		interrupts = <129>;
24256867d88SJim Lin		phy_type = "utmi";
24356867d88SJim Lin		clocks = <&tegra_car 59>;	/* PERIPH_ID_USB3 */
24456867d88SJim Lin		status = "disabled";
24556867d88SJim Lin	};
2468aff0095STom Warren};
247