1/* 2 * (C) Copyright 2025 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8 9/ { 10 aliases { 11 mmc0 = &emmc; 12 mmc1 = &sdmmc0; 13 }; 14 15 chosen { 16 stdout-path = &uart0; 17 u-boot,spl-boot-order = &sdmmc0, &spi_nand, &spi_nor, &emmc; 18 }; 19}; 20 21&gpio0 { 22 u-boot,dm-spl; 23 status = "okay"; 24}; 25 26&gpio1 { 27 u-boot,dm-pre-reloc; 28 status = "okay"; 29}; 30 31&gpio2 { 32 u-boot,dm-spl; 33 status = "okay"; 34}; 35 36&gpio3 { 37 u-boot,dm-pre-reloc; 38 status = "okay"; 39}; 40 41&gpio4 { 42 u-boot,dm-pre-reloc; 43 status = "okay"; 44}; 45 46&grf { 47 u-boot,dm-spl; 48 status = "okay"; 49}; 50 51&ioc_grf { 52 u-boot,dm-spl; 53 status = "okay"; 54}; 55 56&cru { 57 u-boot,dm-spl; 58 status = "okay"; 59}; 60 61&crypto { 62 u-boot,dm-spl; 63 status = "okay"; 64}; 65 66&psci { 67 u-boot,dm-pre-reloc; 68 status = "okay"; 69}; 70 71&uart0 { 72 u-boot,dm-spl; 73 status = "okay"; 74}; 75 76&hw_decompress { 77 u-boot,dm-spl; 78 status = "okay"; 79}; 80 81&rng { 82 u-boot,dm-pre-reloc; 83 status = "okay"; 84}; 85 86&fspi0 { 87 u-boot,dm-spl; 88 status = "okay"; 89 90 #address-cells = <1>; 91 #size-cells = <0>; 92 spi_nand: flash@0 { 93 u-boot,dm-spl; 94 compatible = "spi-nand"; 95 reg = <0>; 96 spi-tx-bus-width = <1>; 97 spi-rx-bus-width = <4>; 98 spi-max-frequency = <80000000>; 99 }; 100 101 spi_nor: flash@1 { 102 u-boot,dm-spl; 103 compatible = "jedec,spi-nor"; 104 label = "sfc_nor"; 105 reg = <0>; 106 spi-tx-bus-width = <1>; 107 spi-rx-bus-width = <4>; 108 spi-max-frequency = <80000000>; 109 }; 110}; 111 112&saradc0 { 113 u-boot,dm-pre-reloc; 114 status = "okay"; 115}; 116 117&sdmmc0 { 118 bus-width = <4>; 119 pinctrl-names = "default"; 120 pinctrl-0 = <&sdmmc0_bus4_pins &sdmmc0_cmd_pins &sdmmc0_clk_pins &sdmmc0_detn_pins>; 121 u-boot,dm-spl; 122 status = "okay"; 123}; 124 125&emmc { 126 bus-width = <8>; 127 mmc-hs200-1_8v; 128 u-boot,dm-spl; 129 status = "okay"; 130}; 131 132&sdmmc0_pins { 133 u-boot,dm-spl; 134}; 135 136&sdmmc0_bus4_pins { 137 u-boot,dm-spl; 138}; 139 140&sdmmc0_cmd_pins { 141 u-boot,dm-spl; 142}; 143 144&sdmmc0_clk_pins { 145 u-boot,dm-spl; 146}; 147 148&sdmmc0_detn_pins { 149 u-boot,dm-spl; 150}; 151 152&pinctrl { 153 u-boot,dm-spl; 154 status = "okay"; 155}; 156 157&pcfg_pull_up { 158 u-boot,dm-spl; 159}; 160 161&pcfg_pull_none { 162 u-boot,dm-spl; 163}; 164 165&usb2phy { 166 u-boot,dm-pre-reloc; 167 status = "okay"; 168}; 169 170&usb2phy_otg { 171 u-boot,dm-pre-reloc; 172 status = "okay"; 173}; 174