1/* 2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 9#include "rv1108.dtsi" 10#include "rv1108-sdram-ddr3-400.dtsi" 11#include <dt-bindings/input/input.h> 12 13/ { 14 model = "Rockchip RV1108 Evaluation board"; 15 compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; 16 17 memory@60000000 { 18 device_type = "memory"; 19 reg = <0x60000000 0x08000000>; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 adc-keys { 27 compatible = "adc-keys"; 28 io-channels = <&saradc 0>; 29 volup-key { 30 linux,code = <KEY_VOLUMEUP>; 31 label = "volume up"; 32 press-threshold-microvolt = <18000>; 33 }; 34 }; 35 36 backlight: backlight { 37 compatible = "pwm-backlight"; 38 pwms = <&pwm0 0 25000 0>; 39 default-brightness-level = <200>; 40 brightness-levels = < 41 0 1 2 3 4 5 6 7 42 8 9 10 11 12 13 14 15 43 16 17 18 19 20 21 22 23 44 24 25 26 27 28 29 30 31 45 32 33 34 35 36 37 38 39 46 40 41 42 43 44 45 46 47 47 48 49 50 51 52 53 54 55 48 56 57 58 59 60 61 62 63 49 64 65 66 67 68 69 70 71 50 72 73 74 75 76 77 78 79 51 80 81 82 83 84 85 86 87 52 88 89 90 91 92 93 94 95 53 96 97 98 99 100 101 102 103 54 104 105 106 107 108 109 110 111 55 112 113 114 115 116 117 118 119 56 120 121 122 123 124 125 126 127 57 128 129 130 131 132 133 134 135 58 136 137 138 139 140 141 142 143 59 144 145 146 147 148 149 150 151 60 152 153 154 155 156 157 158 159 61 160 161 162 163 164 165 166 167 62 168 169 170 171 172 173 174 175 63 176 177 178 179 180 181 182 183 64 184 185 186 187 188 189 190 191 65 192 193 194 195 196 197 198 199 66 200 201 202 203 204 205 206 207 67 208 209 210 211 212 213 214 215 68 216 217 218 219 220 221 222 223 69 224 225 226 227 228 229 230 231 70 232 233 234 235 236 237 238 239 71 240 241 242 243 244 245 246 247 72 248 249 250 251 252 253 254 255>; 73 }; 74 75 vcc5v0_otg: vcc5v0-otg-drv { 76 compatible = "regulator-fixed"; 77 enable-active-high; 78 regulator-name = "vcc5v0_otg"; 79 gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 80 regulator-min-microvolt = <5000000>; 81 regulator-max-microvolt = <5000000>; 82 }; 83}; 84 85&display_subsystem { 86 status = "okay"; 87}; 88 89&dsi { 90 status = "okay"; 91 92 panel: panel@0 { 93 compatible = "simple-panel-dsi"; 94 reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; 95 enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 96 prepare-delay-ms = <20>; 97 reset-delay-ms = <20>; 98 init-delay-ms = <20>; 99 enable-delay-ms = <20>; 100 reg =<0>; 101 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 102 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 103 dsi,format = <MIPI_DSI_FMT_RGB888>; 104 dsi,lanes = <4>; 105 status = "okay"; 106 107 panel-init-sequence = [ 108 39 00 06 F0 55 AA 52 08 00 109 39 00 05 B0 0F 0F 1E 14 110 15 00 02 B2 00 111 15 00 02 B6 03 112 39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00 113 39 00 11 C1 08 24 24 01 18 24 9F 85 08 24 24 01 18 24 95 85 114 39 00 19 C2 03 05 1B 24 13 31 01 05 1B 24 13 31 03 05 1B 38 00 11 02 05 1B 38 00 11 115 39 00 19 C3 02 05 1B 24 13 11 03 05 1B 24 13 11 03 05 1B 38 00 11 02 05 1B 38 00 11 116 39 00 06 F0 55 AA 52 08 01 117 15 00 02 B5 1E 118 15 00 02 B6 2D 119 15 00 02 B7 04 120 15 00 02 B8 05 121 15 00 02 B9 04 122 15 00 02 BA 14 123 15 00 02 BB 2F 124 15 00 02 BE 12 125 39 00 04 C2 00 35 07 126 39 00 06 F0 55 AA 52 08 02 127 15 00 02 C9 13 128 39 00 04 D4 02 04 2C 129 39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15 1F AA 27 2C 31 34 130 39 00 24 E2 00 AD C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35 131 39 00 24 E3 55 05 1E 37 4B 55 5A 64 72 7F 55 8B A3 B8 D1 A5 E4 F6 0E 23 AA 39 42 4F 59 AA 64 70 7A 86 AA 90 96 9C 9F 132 39 00 07 8F 5A 96 3C C3 A5 69 133 15 00 02 89 00 134 39 00 04 8C 55 49 53 135 15 00 02 9A 5A 136 39 00 05 FF A5 5A 13 86 137 39 00 03 FE 01 54 138 15 00 02 35 00 139 15 96 02 11 00 140 15 32 02 29 00 141 ]; 142 143 display-timings { 144 native-mode = <&timing_e555hbm2>; 145 146 timing_e555hbm2: timing0 { 147 clock-frequency = <62000000>; 148 hactive = <720>; 149 vactive = <1280>; 150 hsync-len = <4>; 151 hback-porch = <20>; 152 hfront-porch = <32>; 153 vsync-len = <4>; 154 vback-porch = <15>; 155 vfront-porch = <15>; 156 hsync-active = <0>; 157 vsync-active = <0>; 158 de-active = <0>; 159 pixelclk-active = <0>; 160 }; 161 }; 162 }; 163}; 164 165&gmac { 166 status = "okay"; 167 clock_in_out = <0>; 168 snps,reset-active-low; 169 snps,reset-delays-us = <0 10000 1000000>; 170 snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>; 171}; 172 173&mipi_dphy { 174 status = "okay"; 175}; 176 177&pwm0 { 178 status = "okay"; 179}; 180 181&route_dsi { 182 status = "okay"; 183}; 184 185&saradc { 186 status = "okay"; 187}; 188 189&sfc { 190 compatible = "rockchip,rksfc"; 191 status = "okay"; 192}; 193 194&u2phy { 195 status = "okay"; 196}; 197 198&u2phy_otg { 199 status = "okay"; 200}; 201 202&u2phy_host { 203 status = "okay"; 204}; 205 206&uart0 { 207 status = "okay"; 208}; 209 210&uart1 { 211 status = "okay"; 212}; 213 214&uart2 { 215 status = "okay"; 216}; 217 218&usb20_otg { 219 vbus-supply = <&vcc5v0_otg>; 220 status = "okay"; 221}; 222 223&usb_host_ehci { 224 status = "okay"; 225}; 226 227&usb_host_ohci { 228 status = "okay"; 229}; 230 231&vop { 232 status = "okay"; 233}; 234 235&i2c0 { 236 i2c-scl-rising-time-ns = <275>; 237 i2c-scl-falling-time-ns = <16>; 238 clock-frequency = <200000>; 239 nack-retry = <1>; 240 status = "okay"; 241 242 rk805: pmic@18 { 243 compatible = "rockchip,rk805"; 244 status = "okay"; 245 reg = <0x18>; 246 interrupt-parent = <&gpio1>; 247 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 248 pinctrl-names = "default"; 249 pinctrl-0 = <&pmic_int_l>; 250 rockchip,system-power-controller; 251 wakeup-source; 252 gpio-controller; 253 #gpio-cells = <2>; 254 #clock-cells = <1>; 255 clock-output-names = "xin32k", "rk805-clkout2"; 256 257 pwrkey { 258 status = "okay"; 259 }; 260 261 regulators { 262 vdd_arm: DCDC_REG1 { 263 regulator-name = "vdd_arm"; 264 regulator-min-microvolt = <712500>; 265 regulator-max-microvolt = <1450000>; 266 regulator-ramp-delay = <6001>; 267 regulator-boot-on; 268 regulator-always-on; 269 regulator-state-mem { 270 regulator-on-in-suspend; 271 regulator-suspend-microvolt = <1000000>; 272 }; 273 }; 274 275 vdd_cam: DCDC_REG2 { 276 regulator-name = "vdd_cam"; 277 regulator-min-microvolt = <712500>; 278 regulator-max-microvolt = <2000000>; 279 regulator-ramp-delay = <6001>; 280 regulator-boot-on; 281 regulator-always-on; 282 regulator-state-mem { 283 regulator-on-in-suspend; 284 regulator-suspend-microvolt = <2000000>; 285 }; 286 }; 287 288 vcc_ddr: DCDC_REG3 { 289 regulator-name = "vcc_ddr"; 290 regulator-boot-on; 291 regulator-always-on; 292 regulator-state-mem { 293 regulator-on-in-suspend; 294 }; 295 }; 296 297 vcc_io: DCDC_REG4 { 298 regulator-name = "vcc_io"; 299 regulator-min-microvolt = <3300000>; 300 regulator-max-microvolt = <3300000>; 301 regulator-boot-on; 302 regulator-always-on; 303 regulator-state-mem { 304 regulator-on-in-suspend; 305 regulator-suspend-microvolt = <3300000>; 306 }; 307 }; 308 309 vdd_10: LDO_REG1 { 310 regulator-name = "vdd_10"; 311 regulator-min-microvolt = <1000000>; 312 regulator-max-microvolt = <1000000>; 313 regulator-boot-on; 314 regulator-always-on; 315 regulator-state-mem { 316 regulator-on-in-suspend; 317 regulator-suspend-microvolt = <1000000>; 318 }; 319 }; 320 321 vcc_18emmc: LDO_REG2 { 322 regulator-name = "vcc_18emmc"; 323 regulator-min-microvolt = <1800000>; 324 regulator-max-microvolt = <1800000>; 325 regulator-boot-on; 326 regulator-always-on; 327 regulator-state-mem { 328 regulator-on-in-suspend; 329 regulator-suspend-microvolt = <1800000>; 330 }; 331 }; 332 333 vdd_10_pmu: LDO_REG3 { 334 regulator-name = "vdd_10_pmu"; 335 regulator-min-microvolt = <1000000>; 336 regulator-max-microvolt = <1000000>; 337 regulator-boot-on; 338 regulator-always-on; 339 regulator-state-mem { 340 regulator-on-in-suspend; 341 regulator-suspend-microvolt = <1000000>; 342 }; 343 }; 344 }; 345 }; 346}; 347 348&pinctrl { 349 pmic { 350 pmic_int_l: pmic-int-l { 351 rockchip,pins = 352 <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 353 }; 354 }; 355}; 356