1/* 2 * (C) Copyright 2024 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 / { 8 aliases { 9 mmc1 = &sdmmc0; 10 mmc0 = &emmc; 11 }; 12 13 chosen { 14 stdout-path = &uart0; 15 u-boot,spl-boot-order = &sdmmc0, &spi_nand, &spi_nor, &emmc; 16 }; 17}; 18 19&hw_decompress { 20 u-boot,dm-spl; 21 status = "okay"; 22}; 23 24&emmc { 25 u-boot,dm-spl; 26 status = "okay"; 27}; 28 29&cru { 30 u-boot,dm-spl; 31 status = "okay"; 32}; 33 34&grf { 35 u-boot,dm-spl; 36 status = "okay"; 37}; 38 39&pinctrl { 40 u-boot,dm-spl; 41 status = "okay"; 42}; 43 44&sdmmc0 { 45 u-boot,dm-spl; 46 status = "okay"; 47}; 48 49&ioc { 50 u-boot,dm-spl; 51 status = "okay"; 52}; 53 54&gpio0 { 55 u-boot,dm-spl; 56 status = "okay"; 57}; 58 59&gpio1 { 60 u-boot,dm-pre-reloc; 61 status = "okay"; 62}; 63 64&gpio2 { 65 u-boot,dm-pre-reloc; 66 status = "okay"; 67}; 68 69&crypto { 70 u-boot,dm-spl; 71 status = "okay"; 72}; 73 74&rng { 75 u-boot,dm-spl; 76 status = "okay"; 77}; 78 79&saradc { 80 u-boot,dm-pre-reloc; 81 status = "okay"; 82}; 83 84&sfc { 85 u-boot,dm-spl; 86 status = "okay"; 87 88 #address-cells = <1>; 89 #size-cells = <0>; 90 spi_nand: flash@0 { 91 u-boot,dm-spl; 92 compatible = "spi-nand"; 93 reg = <0>; 94 spi-tx-bus-width = <1>; 95 spi-rx-bus-width = <4>; 96 spi-max-frequency = <80000000>; 97 }; 98 99 spi_nor: flash@1 { 100 u-boot,dm-spl; 101 compatible = "jedec,spi-nor"; 102 label = "sfc_nor"; 103 reg = <0>; 104 spi-tx-bus-width = <1>; 105 spi-rx-bus-width = <4>; 106 spi-max-frequency = <80000000>; 107 }; 108}; 109