1b9dcc643SXuhui Lin/* 2b9dcc643SXuhui Lin * (C) Copyright 2024 Rockchip Electronics Co., Ltd 3b9dcc643SXuhui Lin * 4b9dcc643SXuhui Lin * SPDX-License-Identifier: GPL-2.0+ 5b9dcc643SXuhui Lin */ 6b9dcc643SXuhui Lin 7b9dcc643SXuhui Lin / { 8b9dcc643SXuhui Lin aliases { 9b9dcc643SXuhui Lin mmc1 = &sdmmc0; 10b9dcc643SXuhui Lin mmc0 = &emmc; 11b9dcc643SXuhui Lin }; 12b9dcc643SXuhui Lin 13b9dcc643SXuhui Lin chosen { 14b9dcc643SXuhui Lin stdout-path = &uart0; 15b9dcc643SXuhui Lin u-boot,spl-boot-order = &sdmmc0, &spi_nand, &spi_nor, &emmc; 16b9dcc643SXuhui Lin }; 17df969cb0SXuhui Lin 18df969cb0SXuhui Lin secure-otp@20790000 { 19df969cb0SXuhui Lin compatible = "rockchip,rv1103b-secure-otp"; 20df969cb0SXuhui Lin reg = <0x20790000 0x10000>; 21df969cb0SXuhui Lin secure_conf = <0x20250018>; 22df969cb0SXuhui Lin cru_rst_addr = <0x20000a20>; 23df969cb0SXuhui Lin mask_addr = <0x209d0000>; 24df969cb0SXuhui Lin u-boot,dm-spl; 25df969cb0SXuhui Lin status = "okay"; 26df969cb0SXuhui Lin }; 27b9dcc643SXuhui Lin}; 28b9dcc643SXuhui Lin 290f72b5f7SXuhui Lin&hw_decompress { 300f72b5f7SXuhui Lin u-boot,dm-spl; 310f72b5f7SXuhui Lin status = "okay"; 320f72b5f7SXuhui Lin}; 330f72b5f7SXuhui Lin 34b9dcc643SXuhui Lin&emmc { 35b9dcc643SXuhui Lin u-boot,dm-spl; 36b9dcc643SXuhui Lin status = "okay"; 37b9dcc643SXuhui Lin}; 38b9dcc643SXuhui Lin 39b9dcc643SXuhui Lin&cru { 40b9dcc643SXuhui Lin u-boot,dm-spl; 41b9dcc643SXuhui Lin status = "okay"; 42b9dcc643SXuhui Lin}; 43b9dcc643SXuhui Lin 44b9dcc643SXuhui Lin&grf { 45b9dcc643SXuhui Lin u-boot,dm-spl; 46b9dcc643SXuhui Lin status = "okay"; 47b9dcc643SXuhui Lin}; 48b9dcc643SXuhui Lin 49b9dcc643SXuhui Lin&pinctrl { 50b9dcc643SXuhui Lin u-boot,dm-spl; 51b9dcc643SXuhui Lin status = "okay"; 52b9dcc643SXuhui Lin}; 53b9dcc643SXuhui Lin 54b9dcc643SXuhui Lin&sdmmc0 { 55b9dcc643SXuhui Lin u-boot,dm-spl; 56b9dcc643SXuhui Lin status = "okay"; 57b9dcc643SXuhui Lin}; 58b9dcc643SXuhui Lin 59b9dcc643SXuhui Lin&ioc { 60b9dcc643SXuhui Lin u-boot,dm-spl; 61b9dcc643SXuhui Lin status = "okay"; 62b9dcc643SXuhui Lin}; 63b9dcc643SXuhui Lin 64b9dcc643SXuhui Lin&gpio0 { 65b9dcc643SXuhui Lin u-boot,dm-spl; 66b9dcc643SXuhui Lin status = "okay"; 67b9dcc643SXuhui Lin}; 68b9dcc643SXuhui Lin 69b9dcc643SXuhui Lin&gpio1 { 70b9dcc643SXuhui Lin u-boot,dm-pre-reloc; 71b9dcc643SXuhui Lin status = "okay"; 72b9dcc643SXuhui Lin}; 73b9dcc643SXuhui Lin 74b9dcc643SXuhui Lin&gpio2 { 75b9dcc643SXuhui Lin u-boot,dm-pre-reloc; 76b9dcc643SXuhui Lin status = "okay"; 77b9dcc643SXuhui Lin}; 78b9dcc643SXuhui Lin 79b9dcc643SXuhui Lin&crypto { 80b9dcc643SXuhui Lin u-boot,dm-spl; 81b9dcc643SXuhui Lin status = "okay"; 82b9dcc643SXuhui Lin}; 83b9dcc643SXuhui Lin 84b9dcc643SXuhui Lin&rng { 85b9dcc643SXuhui Lin u-boot,dm-spl; 86b9dcc643SXuhui Lin status = "okay"; 87b9dcc643SXuhui Lin}; 88b9dcc643SXuhui Lin 89b9dcc643SXuhui Lin&saradc { 90b9dcc643SXuhui Lin u-boot,dm-pre-reloc; 91b9dcc643SXuhui Lin status = "okay"; 92b9dcc643SXuhui Lin}; 93b9dcc643SXuhui Lin 94b9dcc643SXuhui Lin&sfc { 95b9dcc643SXuhui Lin u-boot,dm-spl; 96b9dcc643SXuhui Lin status = "okay"; 97b9dcc643SXuhui Lin 98b9dcc643SXuhui Lin #address-cells = <1>; 99b9dcc643SXuhui Lin #size-cells = <0>; 100b9dcc643SXuhui Lin spi_nand: flash@0 { 101b9dcc643SXuhui Lin u-boot,dm-spl; 102b9dcc643SXuhui Lin compatible = "spi-nand"; 103b9dcc643SXuhui Lin reg = <0>; 104b9dcc643SXuhui Lin spi-tx-bus-width = <1>; 105b9dcc643SXuhui Lin spi-rx-bus-width = <4>; 106b9dcc643SXuhui Lin spi-max-frequency = <80000000>; 107b9dcc643SXuhui Lin }; 108b9dcc643SXuhui Lin 109b9dcc643SXuhui Lin spi_nor: flash@1 { 110b9dcc643SXuhui Lin u-boot,dm-spl; 111b9dcc643SXuhui Lin compatible = "jedec,spi-nor"; 112b9dcc643SXuhui Lin label = "sfc_nor"; 113b9dcc643SXuhui Lin reg = <0>; 114b9dcc643SXuhui Lin spi-tx-bus-width = <1>; 115b9dcc643SXuhui Lin spi-rx-bus-width = <4>; 116b9dcc643SXuhui Lin spi-max-frequency = <80000000>; 117b9dcc643SXuhui Lin }; 118b9dcc643SXuhui Lin}; 119*0440715bSWilliam Wu 120*0440715bSWilliam Wu&u2phy { 121*0440715bSWilliam Wu u-boot,dm-pre-reloc; 122*0440715bSWilliam Wu status = "okay"; 123*0440715bSWilliam Wu}; 124*0440715bSWilliam Wu 125*0440715bSWilliam Wu&u2phy_otg { 126*0440715bSWilliam Wu u-boot,dm-pre-reloc; 127*0440715bSWilliam Wu status = "okay"; 128*0440715bSWilliam Wu}; 129*0440715bSWilliam Wu 130