1/* 2 * (C) Copyright 2021 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8 9/ { 10 aliases { 11 mmc0 = &sdhci; 12 mmc1 = &sdmmc; 13 }; 14 15 chosen { 16 stdout-path = &uart2; 17 u-boot,spl-boot-order = &sdmmc, &sdhci, &spi_nand, &spi_nor; 18 }; 19 20 secure-otp@fe3a0000 { 21 u-boot,dm-spl; 22 compatible = "rockchip,rk3588-secure-otp"; 23 reg = <0x0 0xfe3a0000 0x0 0x4000>; 24 }; 25}; 26 27&firmware { 28 u-boot,dm-spl; 29}; 30 31&gpio0 { 32 u-boot,dm-spl; 33 status = "okay"; 34}; 35&gpio1 { 36 u-boot,dm-pre-reloc; 37 status = "okay"; 38}; 39 40&gpio2 { 41 u-boot,dm-pre-reloc; 42 status = "okay"; 43}; 44&gpio3 { 45 u-boot,dm-pre-reloc; 46 status = "okay"; 47}; 48 49&gpio4 { 50 u-boot,dm-pre-reloc; 51 status = "okay"; 52}; 53 54&scmi { 55 u-boot,dm-spl; 56}; 57 58&scmi_clk { 59 u-boot,dm-spl; 60}; 61 62&sram { 63 u-boot,dm-spl; 64}; 65 66&scmi_shmem { 67 u-boot,dm-spl; 68}; 69 70&xin24m { 71 u-boot,dm-pre-reloc; 72 status = "okay"; 73}; 74 75&cru { 76 u-boot,dm-spl; 77 status = "okay"; 78}; 79 80&psci { 81 u-boot,dm-pre-reloc; 82 status = "okay"; 83}; 84 85&crypto { 86 u-boot,dm-spl; 87 status = "okay"; 88}; 89 90&sys_grf { 91 u-boot,dm-spl; 92 status = "okay"; 93}; 94 95&pcie30_phy_grf { 96 u-boot,dm-pre-reloc; 97 status = "okay"; 98}; 99 100&php_grf { 101 u-boot,dm-pre-reloc; 102 status = "okay"; 103}; 104 105&pipe_phy0_grf { 106 u-boot,dm-pre-reloc; 107 status = "okay"; 108}; 109 110&pipe_phy1_grf { 111 u-boot,dm-pre-reloc; 112 status = "okay"; 113}; 114 115&pipe_phy2_grf { 116 u-boot,dm-pre-reloc; 117 status = "okay"; 118}; 119 120&uart2 { 121 u-boot,dm-spl; 122 status = "okay"; 123}; 124 125&hw_decompress { 126 u-boot,dm-spl; 127 status = "okay"; 128}; 129 130&rng { 131 u-boot,dm-pre-reloc; 132 status = "okay"; 133}; 134 135&sfc { 136 u-boot,dm-spl; 137 status = "okay"; 138 139 #address-cells = <1>; 140 #size-cells = <0>; 141 spi_nand: flash@0 { 142 u-boot,dm-spl; 143 compatible = "spi-nand"; 144 reg = <0>; 145 spi-tx-bus-width = <1>; 146 spi-rx-bus-width = <4>; 147 spi-max-frequency = <80000000>; 148 }; 149 150 spi_nor: flash@1 { 151 u-boot,dm-spl; 152 compatible = "jedec,spi-nor"; 153 label = "sfc_nor"; 154 reg = <0>; 155 spi-tx-bus-width = <1>; 156 spi-rx-bus-width = <4>; 157 spi-max-frequency = <80000000>; 158 }; 159}; 160 161&saradc { 162 u-boot,dm-pre-reloc; 163 status = "okay"; 164}; 165 166&sdmmc { 167 bus-width = <4>; 168 u-boot,dm-spl; 169 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 170 status = "okay"; 171}; 172 173&sdhci { 174 bus-width = <8>; 175 u-boot,dm-spl; 176 mmc-hs200-1_8v; 177 non-removable; 178 status = "okay"; 179}; 180 181&usb2phy0_grf { 182 u-boot,dm-pre-reloc; 183}; 184 185&u2phy0 { 186 u-boot,dm-pre-reloc; 187 status = "okay"; 188}; 189 190&u2phy0_otg { 191 u-boot,dm-pre-reloc; 192 status = "okay"; 193}; 194 195/* Support SPL-PINCTRL: 196 * 1. ioc 197 * 2. pinctrl(sdmmc) 198 * 3. gpio if need 199 */ 200&ioc { 201 u-boot,dm-spl; 202}; 203 204&pinctrl { 205 u-boot,dm-spl; 206 /delete-node/ sdmmc; 207 sdmmc { 208 u-boot,dm-spl; 209 sdmmc_bus4: sdmmc-bus4 { 210 u-boot,dm-spl; 211 rockchip,pins = 212 /* sdmmc_d0 */ 213 <4 RK_PD0 1 &pcfg_pull_up_drv_level_2>, 214 /* sdmmc_d1 */ 215 <4 RK_PD1 1 &pcfg_pull_up_drv_level_2>, 216 /* sdmmc_d2 */ 217 <4 RK_PD2 1 &pcfg_pull_up_drv_level_2>, 218 /* sdmmc_d3 */ 219 <4 RK_PD3 1 &pcfg_pull_up_drv_level_2>; 220 }; 221 222 sdmmc_clk: sdmmc-clk { 223 u-boot,dm-spl; 224 rockchip,pins = 225 /* sdmmc_clk */ 226 <4 RK_PD5 1 &pcfg_pull_up_drv_level_2>; 227 }; 228 229 sdmmc_cmd: sdmmc-cmd { 230 u-boot,dm-spl; 231 rockchip,pins = 232 /* sdmmc_cmd */ 233 <4 RK_PD4 1 &pcfg_pull_up_drv_level_2>; 234 }; 235 236 sdmmc_det: sdmmc-det { 237 u-boot,dm-spl; 238 rockchip,pins = 239 /* sdmmc_det */ 240 <0 RK_PA4 1 &pcfg_pull_up>; 241 }; 242 243 sdmmc_pwren: sdmmc-pwren { 244 u-boot,dm-spl; 245 rockchip,pins = 246 /* sdmmc_pwren */ 247 <0 RK_PA5 2 &pcfg_pull_none>; 248 }; 249 }; 250}; 251 252&pcfg_pull_up_drv_level_2 { 253 u-boot,dm-spl; 254}; 255 256&pcfg_pull_up { 257 u-boot,dm-spl; 258}; 259 260&pcfg_pull_none 261{ 262 u-boot,dm-spl; 263}; 264