1/* 2 * (C) Copyright 2023 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8 9/ { 10 aliases { 11 mmc0 = &sdhci; 12 mmc1 = &sdmmc; 13 }; 14 15 chosen { 16 stdout-path = &uart0; 17 u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, "same-as-spl"; 18 }; 19 20 secure-otp@2a480000 { 21 u-boot,dm-spl; 22 compatible = "rockchip,rk3576-secure-otp"; 23 reg = <0x0 0x2a480000 0x0 0x10000>; 24 }; 25}; 26 27&firmware { 28 u-boot,dm-pre-reloc; 29}; 30 31&gpio0 { 32 u-boot,dm-spl; 33 status = "okay"; 34}; 35 36&gpio1 { 37 u-boot,dm-pre-reloc; 38 status = "okay"; 39}; 40 41&gpio2 { 42 u-boot,dm-spl; 43 status = "okay"; 44}; 45 46&gpio3 { 47 u-boot,dm-pre-reloc; 48 status = "okay"; 49}; 50 51&gpio4 { 52 u-boot,dm-pre-reloc; 53 status = "okay"; 54}; 55 56&scmi { 57 u-boot,dm-pre-reloc; 58}; 59 60&scmi_clk { 61 u-boot,dm-pre-reloc; 62}; 63 64&scmi_shmem { 65 u-boot,dm-pre-reloc; 66}; 67 68&sys_grf { 69 u-boot,dm-spl; 70 status = "okay"; 71}; 72 73&ioc_grf { 74 u-boot,dm-spl; 75 status = "okay"; 76}; 77 78&cru { 79 u-boot,dm-spl; 80 status = "okay"; 81}; 82 83&psci { 84 u-boot,dm-pre-reloc; 85 status = "okay"; 86}; 87 88&crypto { 89 u-boot,dm-spl; 90 status = "okay"; 91}; 92 93&uart0 { 94 u-boot,dm-spl; 95 status = "okay"; 96}; 97 98&hw_decompress { 99 u-boot,dm-spl; 100 status = "okay"; 101}; 102 103&rng { 104 u-boot,dm-pre-reloc; 105 status = "okay"; 106}; 107 108&sfc0 { 109 u-boot,dm-spl; 110 status = "okay"; 111 112 #address-cells = <1>; 113 #size-cells = <0>; 114 spi_nand: flash@0 { 115 u-boot,dm-spl; 116 compatible = "spi-nand"; 117 reg = <0>; 118 spi-tx-bus-width = <1>; 119 spi-rx-bus-width = <4>; 120 spi-max-frequency = <80000000>; 121 }; 122 123 spi_nor: flash@1 { 124 u-boot,dm-spl; 125 compatible = "jedec,spi-nor"; 126 label = "sfc_nor"; 127 reg = <0>; 128 spi-tx-bus-width = <1>; 129 spi-rx-bus-width = <4>; 130 spi-max-frequency = <80000000>; 131 }; 132}; 133 134&saradc { 135 u-boot,dm-pre-reloc; 136 status = "okay"; 137}; 138 139&sdmmc { 140 bus-width = <4>; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4 &sdmmc0_pwren>; 143 u-boot,dm-spl; 144 status = "okay"; 145}; 146 147&sdhci { 148 bus-width = <8>; 149 u-boot,dm-spl; 150 mmc-hs400-1_8v; 151 mmc-hs400-enhanced-strobe; 152 non-removable; 153 status = "okay"; 154}; 155 156&sdmmc0 { 157 u-boot,dm-spl; 158}; 159 160&sdmmc0_bus4 { 161 u-boot,dm-spl; 162}; 163 164&sdmmc0_clk { 165 u-boot,dm-spl; 166}; 167 168&sdmmc0_cmd { 169 u-boot,dm-spl; 170}; 171 172&sdmmc0_det { 173 u-boot,dm-spl; 174}; 175 176&sdmmc0_pwren { 177 u-boot,dm-spl; 178}; 179 180&pinctrl { 181 u-boot,dm-spl; 182}; 183 184&pcfg_pull_up_drv_level_2 { 185 u-boot,dm-spl; 186}; 187 188&pcfg_pull_up { 189 u-boot,dm-spl; 190}; 191 192&pcfg_pull_none 193{ 194 u-boot,dm-spl; 195}; 196 197&pcfg_pull_down 198{ 199 u-boot,dm-spl; 200}; 201 202&pcfg_pull_up_drv_level_3 203{ 204 u-boot,dm-spl; 205}; 206 207&php_grf { 208 u-boot,dm-pre-reloc; 209 status = "okay"; 210}; 211 212&pipe_phy0_grf { 213 u-boot,dm-pre-reloc; 214 status = "okay"; 215}; 216 217&pipe_phy1_grf { 218 u-boot,dm-pre-reloc; 219 status = "okay"; 220}; 221 222&usbdpphy_grf { 223 u-boot,dm-pre-reloc; 224}; 225 226&usbdp_phy { 227 u-boot,dm-pre-reloc; 228 status = "okay"; 229}; 230 231&usbdp_phy_u3 { 232 u-boot,dm-pre-reloc; 233 status = "okay"; 234}; 235 236&usb_grf { 237 u-boot,dm-pre-reloc; 238}; 239 240&usb2phy_grf { 241 u-boot,dm-pre-reloc; 242}; 243 244&u2phy0 { 245 u-boot,dm-pre-reloc; 246 status = "okay"; 247}; 248 249&u2phy0_otg { 250 u-boot,dm-pre-reloc; 251 status = "okay"; 252}; 253 254&ufs { 255 u-boot,dm-spl; 256 status = "okay"; 257}; 258