1/* 2 * (C) Copyright 2023 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8 9/ { 10 aliases { 11 mmc0 = &sdhci; 12 mmc1 = &sdmmc; 13 }; 14 15 chosen { 16 stdout-path = &uart0; 17 u-boot,spl-boot-order = &sdmmc, &sdhci, &spi_nand, &spi_nor; 18 }; 19}; 20 21// &firmware { 22// u-boot,dm-spl; 23// status = "okay"; 24// }; 25 26&gpio0 { 27 u-boot,dm-spl; 28 status = "okay"; 29}; 30 31&gpio1 { 32 u-boot,dm-pre-reloc; 33 status = "okay"; 34}; 35 36&gpio2 { 37 u-boot,dm-pre-reloc; 38 status = "okay"; 39}; 40 41&gpio3 { 42 u-boot,dm-pre-reloc; 43 status = "okay"; 44}; 45 46&gpio4 { 47 u-boot,dm-pre-reloc; 48 status = "okay"; 49}; 50 51// &scmi { 52// u-boot,dm-spl; 53// status = "okay"; 54// }; 55 56// &scmi_clk { 57// u-boot,dm-spl; 58// status = "okay"; 59// }; 60 61// &scmi_shmem { 62// u-boot,dm-spl; 63// status = "okay"; 64// }; 65 66&sys_grf { 67 u-boot,dm-spl; 68 status = "okay"; 69}; 70 71&ioc_grf { 72 u-boot,dm-spl; 73 status = "okay"; 74}; 75 76&cru { 77 u-boot,dm-spl; 78 status = "okay"; 79}; 80 81&psci { 82 u-boot,dm-pre-reloc; 83 status = "okay"; 84}; 85 86// &crypto { 87// u-boot,dm-spl; 88// status = "okay"; 89// }; 90 91&uart0 { 92 u-boot,dm-spl; 93 status = "okay"; 94}; 95 96&rng { 97 u-boot,dm-pre-reloc; 98 status = "okay"; 99}; 100 101&sfc0 { 102 u-boot,dm-spl; 103 status = "okay"; 104 105 #address-cells = <1>; 106 #size-cells = <0>; 107 spi_nand: flash@0 { 108 u-boot,dm-spl; 109 compatible = "spi-nand"; 110 reg = <0>; 111 spi-tx-bus-width = <1>; 112 spi-rx-bus-width = <4>; 113 spi-max-frequency = <80000000>; 114 }; 115 116 spi_nor: flash@1 { 117 u-boot,dm-spl; 118 compatible = "jedec,spi-nor"; 119 label = "sfc_nor"; 120 reg = <0>; 121 spi-tx-bus-width = <1>; 122 spi-rx-bus-width = <4>; 123 spi-max-frequency = <80000000>; 124 }; 125}; 126 127&saradc { 128 u-boot,dm-pre-reloc; 129 status = "okay"; 130}; 131 132&sdmmc { 133 bus-width = <4>; 134 u-boot,dm-spl; 135 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 136 status = "okay"; 137}; 138 139&sdhci { 140 bus-width = <8>; 141 u-boot,dm-spl; 142 mmc-hs400-1_8v; 143 mmc-hs400-enhanced-strobe; 144 non-removable; 145 status = "okay"; 146}; 147 148&pinctrl { 149 u-boot,dm-spl; 150 /delete-node/ sdmmc; 151 sdmmc { 152 u-boot,dm-spl; 153 sdmmc_bus4: sdmmc-bus4 { 154 u-boot,dm-spl; 155 rockchip,pins = 156 /* sdmmc_d0 */ 157 <4 RK_PD0 1 &pcfg_pull_up_drv_level_2>, 158 /* sdmmc_d1 */ 159 <4 RK_PD1 1 &pcfg_pull_up_drv_level_2>, 160 /* sdmmc_d2 */ 161 <4 RK_PD2 1 &pcfg_pull_up_drv_level_2>, 162 /* sdmmc_d3 */ 163 <4 RK_PD3 1 &pcfg_pull_up_drv_level_2>; 164 }; 165 166 sdmmc_clk: sdmmc-clk { 167 u-boot,dm-spl; 168 rockchip,pins = 169 /* sdmmc_clk */ 170 <4 RK_PD5 1 &pcfg_pull_up_drv_level_2>; 171 }; 172 173 sdmmc_cmd: sdmmc-cmd { 174 u-boot,dm-spl; 175 rockchip,pins = 176 /* sdmmc_cmd */ 177 <4 RK_PD4 1 &pcfg_pull_up_drv_level_2>; 178 }; 179 180 sdmmc_det: sdmmc-det { 181 u-boot,dm-spl; 182 rockchip,pins = 183 /* sdmmc_det */ 184 <0 RK_PA4 1 &pcfg_pull_up>; 185 }; 186 187 sdmmc_pwren: sdmmc-pwren { 188 u-boot,dm-spl; 189 rockchip,pins = 190 /* sdmmc_pwren */ 191 <0 RK_PA5 2 &pcfg_pull_none>; 192 }; 193 }; 194}; 195 196&pcfg_pull_up_drv_level_2 { 197 u-boot,dm-spl; 198}; 199 200&pcfg_pull_up { 201 u-boot,dm-spl; 202}; 203 204&pcfg_pull_none 205{ 206 u-boot,dm-spl; 207}; 208 209&php_grf { 210 u-boot,dm-pre-reloc; 211 status = "okay"; 212}; 213 214&pipe_phy0_grf { 215 u-boot,dm-pre-reloc; 216 status = "okay"; 217}; 218 219&pipe_phy1_grf { 220 u-boot,dm-pre-reloc; 221 status = "okay"; 222}; 223 224&usbdpphy_grf { 225 u-boot,dm-pre-reloc; 226}; 227 228&usbdp_phy { 229 u-boot,dm-pre-reloc; 230 status = "okay"; 231}; 232 233&usbdp_phy_u3 { 234 u-boot,dm-pre-reloc; 235 status = "okay"; 236}; 237 238&usb_grf { 239 u-boot,dm-pre-reloc; 240}; 241 242&usb2phy_grf { 243 u-boot,dm-pre-reloc; 244}; 245 246&u2phy0 { 247 u-boot,dm-pre-reloc; 248 status = "okay"; 249}; 250 251&u2phy0_otg { 252 u-boot,dm-pre-reloc; 253 status = "okay"; 254}; 255