xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3576-u-boot.dtsi (revision 617efdd130d3f8e8b0318795e46b77dc767a7361) 
1/*
2 * (C) Copyright 2023 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8
9/ {
10	aliases {
11		mmc0 = &sdhci;
12		mmc1 = &sdmmc;
13	};
14
15	chosen {
16		stdout-path = &uart0;
17		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, "same-as-spl";
18	};
19
20	secure-otp@2a480000 {
21		u-boot,dm-spl;
22		compatible = "rockchip,rk3576-secure-otp";
23		reg = <0x0 0x2a480000 0x0 0x10000>;
24	};
25};
26
27&firmware {
28	u-boot,dm-pre-reloc;
29};
30
31&gpio0 {
32	u-boot,dm-spl;
33	status = "okay";
34};
35
36&gpio1 {
37	u-boot,dm-pre-reloc;
38	status = "okay";
39};
40
41&gpio2 {
42	u-boot,dm-pre-reloc;
43	status = "okay";
44};
45
46&gpio3 {
47	u-boot,dm-pre-reloc;
48	status = "okay";
49};
50
51&gpio4 {
52	u-boot,dm-pre-reloc;
53	status = "okay";
54};
55
56&scmi {
57	u-boot,dm-pre-reloc;
58};
59
60&scmi_clk {
61	u-boot,dm-pre-reloc;
62};
63
64&scmi_shmem {
65	u-boot,dm-pre-reloc;
66};
67
68&sys_grf {
69	u-boot,dm-spl;
70	status = "okay";
71};
72
73&ioc_grf {
74	u-boot,dm-spl;
75	status = "okay";
76};
77
78&cru {
79	u-boot,dm-spl;
80	status = "okay";
81};
82
83&psci {
84	u-boot,dm-pre-reloc;
85	status = "okay";
86};
87
88&crypto {
89	u-boot,dm-spl;
90	status = "okay";
91};
92
93&uart0 {
94	u-boot,dm-spl;
95	status = "okay";
96};
97
98&rng {
99	u-boot,dm-pre-reloc;
100	status = "okay";
101};
102
103&sfc0 {
104	u-boot,dm-spl;
105	status = "okay";
106
107	#address-cells = <1>;
108	#size-cells = <0>;
109	spi_nand: flash@0 {
110		u-boot,dm-spl;
111		compatible = "spi-nand";
112		reg = <0>;
113		spi-tx-bus-width = <1>;
114		spi-rx-bus-width = <4>;
115		spi-max-frequency = <80000000>;
116	};
117
118	spi_nor: flash@1 {
119		u-boot,dm-spl;
120		compatible = "jedec,spi-nor";
121		label = "sfc_nor";
122		reg = <0>;
123		spi-tx-bus-width = <1>;
124		spi-rx-bus-width = <4>;
125		spi-max-frequency = <80000000>;
126	};
127};
128
129&saradc {
130	u-boot,dm-pre-reloc;
131	status = "okay";
132};
133
134&sdmmc {
135	bus-width = <4>;
136	u-boot,dm-spl;
137	pwr-en-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
138	status = "okay";
139};
140
141&sdhci {
142	bus-width = <8>;
143	u-boot,dm-spl;
144	mmc-hs400-1_8v;
145	mmc-hs400-enhanced-strobe;
146	non-removable;
147	status = "okay";
148};
149
150&sdmmc0 {
151	u-boot,dm-spl;
152};
153
154&sdmmc0_bus4 {
155	u-boot,dm-spl;
156};
157
158&sdmmc0_clk {
159	u-boot,dm-spl;
160};
161
162&sdmmc0_cmd {
163	u-boot,dm-spl;
164};
165
166&sdmmc0_det {
167	u-boot,dm-spl;
168};
169
170&pinctrl {
171	u-boot,dm-spl;
172};
173
174&pcfg_pull_up_drv_level_2 {
175	u-boot,dm-spl;
176};
177
178&pcfg_pull_up {
179	u-boot,dm-spl;
180};
181
182&pcfg_pull_none
183{
184	u-boot,dm-spl;
185};
186
187&php_grf {
188	u-boot,dm-pre-reloc;
189	status = "okay";
190};
191
192&pipe_phy0_grf {
193	u-boot,dm-pre-reloc;
194	status = "okay";
195};
196
197&pipe_phy1_grf {
198	u-boot,dm-pre-reloc;
199	status = "okay";
200};
201
202&usbdpphy_grf {
203	u-boot,dm-pre-reloc;
204};
205
206&usbdp_phy {
207	u-boot,dm-pre-reloc;
208	status = "okay";
209};
210
211&usbdp_phy_u3 {
212	u-boot,dm-pre-reloc;
213	status = "okay";
214};
215
216&usb_grf {
217	u-boot,dm-pre-reloc;
218};
219
220&usb2phy_grf {
221	u-boot,dm-pre-reloc;
222};
223
224&u2phy0 {
225	u-boot,dm-pre-reloc;
226	status = "okay";
227};
228
229&u2phy0_otg {
230	u-boot,dm-pre-reloc;
231	status = "okay";
232};
233
234&ufs {
235	u-boot,dm-spl;
236	status = "okay";
237};
238