xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3576-u-boot.dtsi (revision b2ea6a555cb51034d7aac47c9606324d51e8cd5f)
1b67262e1SXuhui Lin/*
2b67262e1SXuhui Lin * (C) Copyright 2023 Rockchip Electronics Co., Ltd
3b67262e1SXuhui Lin *
4b67262e1SXuhui Lin * SPDX-License-Identifier:     GPL-2.0+
5b67262e1SXuhui Lin */
6b67262e1SXuhui Lin
7b67262e1SXuhui Lin#include <dt-bindings/gpio/gpio.h>
8b67262e1SXuhui Lin
9b67262e1SXuhui Lin/ {
10b67262e1SXuhui Lin	aliases {
11b67262e1SXuhui Lin		mmc0 = &sdhci;
12b67262e1SXuhui Lin		mmc1 = &sdmmc;
13b67262e1SXuhui Lin	};
14b67262e1SXuhui Lin
15b67262e1SXuhui Lin	chosen {
16b67262e1SXuhui Lin		stdout-path = &uart0;
176107dffaSJon Lin		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, "same-as-spl";
18b67262e1SXuhui Lin	};
1967c708a3SXuhui Lin
2067c708a3SXuhui Lin	secure-otp@2a480000 {
2167c708a3SXuhui Lin		u-boot,dm-spl;
2267c708a3SXuhui Lin		compatible = "rockchip,rk3576-secure-otp";
2367c708a3SXuhui Lin		reg = <0x0 0x2a480000 0x0 0x10000>;
2467c708a3SXuhui Lin	};
25b67262e1SXuhui Lin};
26b67262e1SXuhui Lin
27f63a7390SFinley Xiao&firmware {
28f63a7390SFinley Xiao	u-boot,dm-pre-reloc;
29f63a7390SFinley Xiao};
30b67262e1SXuhui Lin
31b67262e1SXuhui Lin&gpio0 {
32b67262e1SXuhui Lin	u-boot,dm-spl;
33b67262e1SXuhui Lin	status = "okay";
34b67262e1SXuhui Lin};
35b67262e1SXuhui Lin
36b67262e1SXuhui Lin&gpio1 {
37b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
38b67262e1SXuhui Lin	status = "okay";
39b67262e1SXuhui Lin};
40b67262e1SXuhui Lin
41b67262e1SXuhui Lin&gpio2 {
42b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
43b67262e1SXuhui Lin	status = "okay";
44b67262e1SXuhui Lin};
45b67262e1SXuhui Lin
46b67262e1SXuhui Lin&gpio3 {
47b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
48b67262e1SXuhui Lin	status = "okay";
49b67262e1SXuhui Lin};
50b67262e1SXuhui Lin
51b67262e1SXuhui Lin&gpio4 {
52b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
53b67262e1SXuhui Lin	status = "okay";
54b67262e1SXuhui Lin};
55b67262e1SXuhui Lin
56f63a7390SFinley Xiao&scmi {
57f63a7390SFinley Xiao	u-boot,dm-pre-reloc;
58f63a7390SFinley Xiao};
59b67262e1SXuhui Lin
60f63a7390SFinley Xiao&scmi_clk {
61f63a7390SFinley Xiao	u-boot,dm-pre-reloc;
62f63a7390SFinley Xiao};
63b67262e1SXuhui Lin
64f63a7390SFinley Xiao&scmi_shmem {
65f63a7390SFinley Xiao	u-boot,dm-pre-reloc;
66f63a7390SFinley Xiao};
67b67262e1SXuhui Lin
68b67262e1SXuhui Lin&sys_grf {
69b67262e1SXuhui Lin	u-boot,dm-spl;
70b67262e1SXuhui Lin	status = "okay";
71b67262e1SXuhui Lin};
72b67262e1SXuhui Lin
73b67262e1SXuhui Lin&ioc_grf {
74b67262e1SXuhui Lin	u-boot,dm-spl;
75b67262e1SXuhui Lin	status = "okay";
76b67262e1SXuhui Lin};
77b67262e1SXuhui Lin
78b67262e1SXuhui Lin&cru {
79b67262e1SXuhui Lin	u-boot,dm-spl;
80b67262e1SXuhui Lin	status = "okay";
81b67262e1SXuhui Lin};
82b67262e1SXuhui Lin
83b67262e1SXuhui Lin&psci {
84b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
85b67262e1SXuhui Lin	status = "okay";
86b67262e1SXuhui Lin};
87b67262e1SXuhui Lin
88da467dcdSXuhui Lin&crypto {
89da467dcdSXuhui Lin	u-boot,dm-spl;
90da467dcdSXuhui Lin	status = "okay";
91da467dcdSXuhui Lin};
92b67262e1SXuhui Lin
93b67262e1SXuhui Lin&uart0 {
94b67262e1SXuhui Lin	u-boot,dm-spl;
95b67262e1SXuhui Lin	status = "okay";
96b67262e1SXuhui Lin};
97b67262e1SXuhui Lin
980f25b6ceSXuhui Lin&hw_decompress {
990f25b6ceSXuhui Lin	u-boot,dm-spl;
1000f25b6ceSXuhui Lin	status = "okay";
1010f25b6ceSXuhui Lin};
1020f25b6ceSXuhui Lin
103b67262e1SXuhui Lin&rng {
104b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
105b67262e1SXuhui Lin	status = "okay";
106b67262e1SXuhui Lin};
107b67262e1SXuhui Lin
108b67262e1SXuhui Lin&sfc0 {
109b67262e1SXuhui Lin	u-boot,dm-spl;
110b67262e1SXuhui Lin	status = "okay";
111b67262e1SXuhui Lin
112b67262e1SXuhui Lin	#address-cells = <1>;
113b67262e1SXuhui Lin	#size-cells = <0>;
114b67262e1SXuhui Lin	spi_nand: flash@0 {
115b67262e1SXuhui Lin		u-boot,dm-spl;
116b67262e1SXuhui Lin		compatible = "spi-nand";
117b67262e1SXuhui Lin		reg = <0>;
118b67262e1SXuhui Lin		spi-tx-bus-width = <1>;
119b67262e1SXuhui Lin		spi-rx-bus-width = <4>;
120b67262e1SXuhui Lin		spi-max-frequency = <80000000>;
121b67262e1SXuhui Lin	};
122b67262e1SXuhui Lin
123b67262e1SXuhui Lin	spi_nor: flash@1 {
124b67262e1SXuhui Lin		u-boot,dm-spl;
125b67262e1SXuhui Lin		compatible = "jedec,spi-nor";
126b67262e1SXuhui Lin		label = "sfc_nor";
127b67262e1SXuhui Lin		reg = <0>;
128b67262e1SXuhui Lin		spi-tx-bus-width = <1>;
129b67262e1SXuhui Lin		spi-rx-bus-width = <4>;
130b67262e1SXuhui Lin		spi-max-frequency = <80000000>;
131b67262e1SXuhui Lin	};
132b67262e1SXuhui Lin};
133b67262e1SXuhui Lin
134b67262e1SXuhui Lin&saradc {
135b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
136b67262e1SXuhui Lin	status = "okay";
137b67262e1SXuhui Lin};
138b67262e1SXuhui Lin
139b67262e1SXuhui Lin&sdmmc {
140b67262e1SXuhui Lin	bus-width = <4>;
141b67262e1SXuhui Lin	u-boot,dm-spl;
142b67262e1SXuhui Lin	status = "okay";
143b67262e1SXuhui Lin};
144b67262e1SXuhui Lin
145b67262e1SXuhui Lin&sdhci {
146b67262e1SXuhui Lin	bus-width = <8>;
147b67262e1SXuhui Lin	u-boot,dm-spl;
148b67262e1SXuhui Lin	mmc-hs400-1_8v;
149b67262e1SXuhui Lin	mmc-hs400-enhanced-strobe;
150b67262e1SXuhui Lin	non-removable;
151b67262e1SXuhui Lin	status = "okay";
152b67262e1SXuhui Lin};
153b67262e1SXuhui Lin
154c851160eSYifeng Zhao&sdmmc0 {
155c851160eSYifeng Zhao	u-boot,dm-spl;
156c851160eSYifeng Zhao};
157c851160eSYifeng Zhao
158c851160eSYifeng Zhao&sdmmc0_bus4 {
159c851160eSYifeng Zhao	u-boot,dm-spl;
160c851160eSYifeng Zhao};
161c851160eSYifeng Zhao
162c851160eSYifeng Zhao&sdmmc0_clk {
163c851160eSYifeng Zhao	u-boot,dm-spl;
164c851160eSYifeng Zhao};
165c851160eSYifeng Zhao
166c851160eSYifeng Zhao&sdmmc0_cmd {
167c851160eSYifeng Zhao	u-boot,dm-spl;
168c851160eSYifeng Zhao};
169c851160eSYifeng Zhao
170c851160eSYifeng Zhao&sdmmc0_det {
171c851160eSYifeng Zhao	u-boot,dm-spl;
172c851160eSYifeng Zhao};
173c851160eSYifeng Zhao
174*b2ea6a55SYifeng Zhao&sdmmc0_pwren {
175*b2ea6a55SYifeng Zhao	u-boot,dm-spl;
176*b2ea6a55SYifeng Zhao};
177*b2ea6a55SYifeng Zhao
178b67262e1SXuhui Lin&pinctrl {
179b67262e1SXuhui Lin	u-boot,dm-spl;
180b67262e1SXuhui Lin};
181b67262e1SXuhui Lin
182b67262e1SXuhui Lin&pcfg_pull_up_drv_level_2 {
183b67262e1SXuhui Lin	u-boot,dm-spl;
184b67262e1SXuhui Lin};
185b67262e1SXuhui Lin
186b67262e1SXuhui Lin&pcfg_pull_up {
187b67262e1SXuhui Lin	u-boot,dm-spl;
188b67262e1SXuhui Lin};
189b67262e1SXuhui Lin
190b67262e1SXuhui Lin&pcfg_pull_none
191b67262e1SXuhui Lin{
192b67262e1SXuhui Lin	u-boot,dm-spl;
193b67262e1SXuhui Lin};
194b67262e1SXuhui Lin
195b67262e1SXuhui Lin&php_grf {
196b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
197b67262e1SXuhui Lin	status = "okay";
198b67262e1SXuhui Lin};
199b67262e1SXuhui Lin
200b67262e1SXuhui Lin&pipe_phy0_grf {
201b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
202b67262e1SXuhui Lin	status = "okay";
203b67262e1SXuhui Lin};
204b67262e1SXuhui Lin
205b67262e1SXuhui Lin&pipe_phy1_grf {
206b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
207b67262e1SXuhui Lin	status = "okay";
208b67262e1SXuhui Lin};
209b67262e1SXuhui Lin
210b67262e1SXuhui Lin&usbdpphy_grf {
211b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
212b67262e1SXuhui Lin};
213b67262e1SXuhui Lin
214b67262e1SXuhui Lin&usbdp_phy {
215b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
216b67262e1SXuhui Lin	status = "okay";
217b67262e1SXuhui Lin};
218b67262e1SXuhui Lin
219b67262e1SXuhui Lin&usbdp_phy_u3 {
220b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
221b67262e1SXuhui Lin	status = "okay";
222b67262e1SXuhui Lin};
223b67262e1SXuhui Lin
224b67262e1SXuhui Lin&usb_grf {
225b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
226b67262e1SXuhui Lin};
227b67262e1SXuhui Lin
228b67262e1SXuhui Lin&usb2phy_grf {
229b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
230b67262e1SXuhui Lin};
231b67262e1SXuhui Lin
232b67262e1SXuhui Lin&u2phy0 {
233b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
234b67262e1SXuhui Lin	status = "okay";
235b67262e1SXuhui Lin};
236b67262e1SXuhui Lin
237b67262e1SXuhui Lin&u2phy0_otg {
238b67262e1SXuhui Lin	u-boot,dm-pre-reloc;
239b67262e1SXuhui Lin	status = "okay";
240b67262e1SXuhui Lin};
2413c3b61c2SYifeng Zhao
2423c3b61c2SYifeng Zhao&ufs {
2433c3b61c2SYifeng Zhao	u-boot,dm-spl;
2443c3b61c2SYifeng Zhao	status = "okay";
2453c3b61c2SYifeng Zhao};
246