1/* 2 * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/ { 8 aliases { 9 mmc0 = &sdhci; 10 mmc1 = &sdmmc; 11 }; 12 13 chosen { 14 stdout-path = &uart2; 15 u-boot,spl-boot-order = &sdmmc, &sdhci, &spi_nand, &spi_nor; 16 }; 17}; 18 19&grf { 20 u-boot,dm-spl; 21 status = "okay"; 22}; 23 24&rng { 25 u-boot,dm-spl; 26 status = "okay"; 27}; 28 29&ioc_grf { 30 u-boot,dm-spl; 31 status = "okay"; 32}; 33 34&cru { 35 u-boot,dm-spl; 36 status = "okay"; 37}; 38 39&crypto { 40 clocks = <&cru CLK_CORE_CRYPTO>, <&cru CLK_PKA_CRYPTO>; 41 clock-names = "sclk_crypto", "apkclk_crypto"; 42 clock-frequency = <200000000>, <300000000>; 43 u-boot,dm-spl; 44 status = "okay"; 45}; 46 47&rng { 48 u-boot,dm-pre-reloc; 49 status = "okay"; 50}; 51 52&psci { 53 u-boot,dm-pre-reloc; 54 status = "okay"; 55}; 56 57&uart2 { 58 clock-frequency = <24000000>; 59 u-boot,dm-spl; 60 status = "okay"; 61}; 62 63&sfc { 64 u-boot,dm-spl; 65 /delete-property/ pinctrl-names; 66 /delete-property/ pinctrl-0; 67 /delete-property/ assigned-clocks; 68 /delete-property/ assigned-clock-rates; 69 status = "okay"; 70 71 #address-cells = <1>; 72 #size-cells = <0>; 73 spi_nand: flash@0 { 74 u-boot,dm-spl; 75 compatible = "spi-nand"; 76 reg = <0>; 77 spi-tx-bus-width = <1>; 78 spi-rx-bus-width = <4>; 79 spi-max-frequency = <75000000>; 80 }; 81 82 spi_nor: flash@1 { 83 u-boot,dm-spl; 84 compatible = "jedec,spi-nor"; 85 label = "sfc_nor"; 86 reg = <0>; 87 spi-tx-bus-width = <1>; 88 spi-rx-bus-width = <4>; 89 spi-max-frequency = <100000000>; 90 }; 91}; 92 93&sdhci { 94 bus-width = <8>; 95 u-boot,dm-spl; 96 /delete-property/ pinctrl-names; 97 /delete-property/ pinctrl-0; 98 mmc-hs200-1_8v; 99 status = "okay"; 100}; 101 102&sdmmc { 103 u-boot,dm-spl; 104 status = "okay"; 105}; 106 107&saradc { 108 u-boot,dm-spl; 109 status = "okay"; 110}; 111 112&u2phy_otg { 113 u-boot,dm-pre-reloc; 114 status = "okay"; 115}; 116 117&usb2phy { 118 u-boot,dm-pre-reloc; 119 status = "okay"; 120}; 121 122&firmware { 123 u-boot,dm-pre-reloc; 124}; 125 126&scmi { 127 u-boot,dm-pre-reloc; 128}; 129 130&scmi_clk { 131 u-boot,dm-pre-reloc; 132}; 133 134&scmi_shmem { 135 u-boot,dm-pre-reloc; 136}; 137 138