1/* 2 * (C) Copyright 2024 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/ { 8 aliases { 9 mmc0 = &mmc; 10 }; 11 12 chosen: chosen { 13 stdout-path = &uart0; 14 u-boot,spl-boot-order = &spi_nand, &spi_nor; 15 }; 16}; 17 18&mmc { 19 u-boot,dm-spl; 20 status = "okay"; 21}; 22 23&cru { 24 u-boot,dm-spl; 25 status = "okay"; 26}; 27 28&grf { 29 u-boot,dm-spl; 30 status = "okay"; 31}; 32 33&ioc_grf { 34 u-boot,dm-spl; 35 status = "okay"; 36}; 37 38&pinctrl { 39 u-boot,dm-spl; 40 status = "okay"; 41}; 42 43&ioc1 { 44 u-boot,dm-spl; 45 status = "okay"; 46}; 47 48&grf_pmu { 49 u-boot,dm-spl; 50 status = "okay"; 51}; 52 53&ioc_pmu { 54 u-boot,dm-spl; 55 status = "okay"; 56}; 57 58&gpio0 { 59 u-boot,dm-spl; 60 status = "okay"; 61}; 62 63&gpio1 { 64 u-boot,dm-pre-reloc; 65 status = "okay"; 66}; 67 68&gpio2 { 69 u-boot,dm-pre-reloc; 70 status = "okay"; 71}; 72 73&gpio3 { 74 u-boot,dm-spl; 75 status = "okay"; 76}; 77 78&gpio4 { 79 u-boot,dm-pre-reloc; 80 status = "okay"; 81}; 82 83&psci { 84 u-boot,dm-pre-reloc; 85 status = "okay"; 86}; 87 88&crypto { 89 u-boot,dm-spl; 90 status = "okay"; 91}; 92 93&rng { 94 u-boot,dm-spl; 95 status = "okay"; 96}; 97 98&saradc { 99 u-boot,dm-spl; 100 status = "okay"; 101}; 102 103&fspi { 104 u-boot,dm-spl; 105 status = "okay"; 106 107 #address-cells = <1>; 108 #size-cells = <0>; 109 spi_nand: flash@0 { 110 u-boot,dm-spl; 111 compatible = "spi-nand"; 112 reg = <0>; 113 spi-tx-bus-width = <1>; 114 spi-rx-bus-width = <4>; 115 spi-max-frequency = <80000000>; 116 }; 117 118 spi_nor: flash@1 { 119 u-boot,dm-spl; 120 compatible = "jedec,spi-nor"; 121 label = "sfc_nor"; 122 reg = <0>; 123 spi-tx-bus-width = <1>; 124 spi-rx-bus-width = <4>; 125 spi-max-frequency = <80000000>; 126 }; 127}; 128 129&usb2phy { 130 u-boot,dm-pre-reloc; 131 status = "okay"; 132}; 133 134&u2phy_otg0 { 135 u-boot,dm-pre-reloc; 136 status = "okay"; 137}; 138 139&usb20_otg0 { 140 u-boot,dm-pre-reloc; 141 status = "okay"; 142}; 143