1/* 2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3 * 4 * SPDX-License-Identifier: GPL-2.0+ X11 5 */ 6 7#include <dt-bindings/pwm/pwm.h> 8#include "rk3399.dtsi" 9 10/ { 11 model = "Theobroma Systems RK3399-Q7 SoM"; 12 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399"; 13 14 config { 15 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ 16 u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ 17 u-boot,boot-led = "module_led"; 18 }; 19 20 chosen { 21 stdout-path = "serial0:115200n8"; 22 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc; 23 }; 24 25 aliases { 26 spi0 = &spi1; 27 spi1 = &spi5; 28 }; 29 30 leds { 31 compatible = "gpio-leds"; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&leds_pins_puma>; 34 35 module_led { 36 label = "module_led"; 37 gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; 38 linux,default-trigger = "heartbeat"; 39 }; 40 41 sd_card_led { 42 label = "sd_card_led"; 43 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 44 linux,default-trigger = "mmc0"; 45 }; 46 }; 47 48 clkin_gmac: external-gmac-clock { 49 compatible = "fixed-clock"; 50 clock-frequency = <125000000>; 51 clock-output-names = "clkin_gmac"; 52 #clock-cells = <0>; 53 }; 54 55 dw_hdmi_audio: dw-hdmi-audio { 56 status = "enabled"; 57 compatible = "rockchip,dw-hdmi-audio"; 58 #sound-dai-cells = <0>; 59 }; 60 61 hdmi_codec: hdmi-codec { 62 compatible = "simple-audio-card"; 63 simple-audio-card,format = "i2s"; 64 simple-audio-card,mclk-fs = <256>; 65 simple-audio-card,name = "HDMI-CODEC"; 66 67 simple-audio-card,cpu { 68 sound-dai = <&i2s2>; 69 }; 70 71 simple-audio-card,codec { 72 sound-dai = <&hdmi>; 73 }; 74 }; 75 76 hdmi_sound: hdmi-sound { 77 status = "disabled"; 78 compatible = "simple-audio-card"; 79 simple-audio-card,format = "i2s"; 80 simple-audio-card,mclk-fs = <256>; 81 simple-audio-card,name = "rockchip,hdmi"; 82 83 simple-audio-card,cpu { 84 sound-dai = <&i2s2>; 85 }; 86 simple-audio-card,codec { 87 sound-dai = <&hdmi>; 88 }; 89 }; 90 91 vccadc_ref: vccadc-ref { 92 compatible = "regulator-fixed"; 93 regulator-name = "vcc1v8_sys"; 94 regulator-always-on; 95 regulator-boot-on; 96 regulator-min-microvolt = <1800000>; 97 regulator-max-microvolt = <1800000>; 98 }; 99 100 vcc3v3_sys: vcc3v3-sys { 101 compatible = "regulator-fixed"; 102 regulator-name = "vcc3v3_sys"; 103 regulator-always-on; 104 regulator-boot-on; 105 regulator-min-microvolt = <3300000>; 106 regulator-max-microvolt = <3300000>; 107 }; 108 109 vcc5v0_otg: vcc5v0-otg-regulator { 110 compatible = "regulator-fixed"; 111 enable-active-high; 112 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&otg_vbus_drv>; 115 regulator-name = "vcc5v0_otg"; 116 regulator-always-on; 117 }; 118 119 vcc5v0_host: vcc5v0-host-regulator { 120 compatible = "regulator-fixed"; 121 enable-active-low; 122 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; 123 pinctrl-names = "default"; 124 pinctrl-0 = <&host_vbus_drv>; 125 regulator-name = "vcc5v0_host"; 126 regulator-always-on; 127 }; 128 129 vcc5v0_sys: vcc5v0-sys { 130 compatible = "regulator-fixed"; 131 regulator-name = "vcc5v0_sys"; 132 regulator-always-on; 133 regulator-boot-on; 134 regulator-min-microvolt = <5000000>; 135 regulator-max-microvolt = <5000000>; 136 }; 137 138 vcc_phy: vcc-phy-regulator { 139 compatible = "regulator-fixed"; 140 regulator-name = "vcc_phy"; 141 regulator-always-on; 142 regulator-boot-on; 143 }; 144 145 vdd_log: vdd-log { 146 compatible = "pwm-regulator"; 147 pwms = <&pwm2 0 25000 1>; 148 regulator-name = "vdd_log"; 149 regulator-min-microvolt = <800000>; 150 regulator-max-microvolt = <1400000>; 151 regulator-always-on; 152 regulator-boot-on; 153 154 /* for rockchip boot on */ 155 rockchip,pwm_id= <2>; 156 rockchip,pwm_voltage = <1000000>; 157 }; 158}; 159 160&emmc_phy { 161 status = "okay"; 162}; 163 164&gmac { 165 phy-supply = <&vcc_phy>; 166 phy-mode = "rgmii"; 167 clock_in_out = "input"; 168 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; 169 snps,reset-active-low; 170 snps,reset-delays-us = <2 10000 50000>; 171 assigned-clocks = <&cru SCLK_RMII_SRC>; 172 assigned-clock-parents = <&clkin_gmac>; 173 pinctrl-names = "default"; 174 pinctrl-0 = <&rgmii_pins>; 175 tx_delay = <0x10>; 176 rx_delay = <0x10>; 177 status = "okay"; 178}; 179 180&hdmi { 181 #address-cells = <1>; 182 #size-cells = <0>; 183 #sound-dai-cells = <0>; 184 status = "okay"; 185}; 186 187&i2c0 { 188 status = "okay"; 189 i2c-scl-rising-time-ns = <168>; 190 i2c-scl-falling-time-ns = <4>; 191 clock-frequency = <400000>; 192 193 vdd_gpu: fan535555@60 { 194 compatible = "fcs,fan53555"; 195 reg = <0x60>; 196 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 197 vin-supply = <&vcc5v0_sys>; 198 regulator-compatible = "fan53555-reg"; 199 regulator-name = "vdd_gpu"; 200 regulator-min-microvolt = <600000>; 201 regulator-max-microvolt = <1230000>; 202 regulator-ramp-delay = <1000>; 203 fcs,suspend-voltage-selector = <1>; 204 regulator-always-on; 205 regulator-boot-on; 206 regulator-initial-state = <3>; 207 regulator-state-mem { 208 regulator-off-in-suspend; 209 }; 210 }; 211 212 rk808: pmic@1b { 213 compatible = "rockchip,rk808"; 214 reg = <0x1b>; 215 interrupt-parent = <&gpio1>; 216 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt? 217 pinctrl-names = "default"; 218 pinctrl-0 = <&pmic_int_l>; 219 rockchip,system-power-controller; 220 wakeup-source; 221 #clock-cells = <1>; 222 clock-output-names = "xin32k", "rk808-clkout2"; 223 224 vcc1-supply = <&vcc5v0_sys>; 225 vcc2-supply = <&vcc5v0_sys>; 226 vcc3-supply = <&vcc5v0_sys>; 227 vcc4-supply = <&vcc5v0_sys>; 228 vcc6-supply = <&vcc5v0_sys>; 229 vcc7-supply = <&vcc5v0_sys>; 230 vcc8-supply = <&vcc3v3_sys>; 231 vcc9-supply = <&vcc5v0_sys>; 232 vcc10-supply = <&vcc5v0_sys>; 233 vcc11-supply = <&vcc5v0_sys>; 234 vcc12-supply = <&vcc3v3_sys>; 235 vddio-supply = <&vcc1v8_pmu>; 236 237 regulators { 238 vdd_center: DCDC_REG1 { 239 regulator-always-on; 240 regulator-boot-on; 241 regulator-min-microvolt = <750000>; 242 regulator-max-microvolt = <1350000>; 243 regulator-ramp-delay = <6001>; 244 regulator-name = "vdd_center"; 245 regulator-state-mem { 246 regulator-off-in-suspend; 247 }; 248 }; 249 250 vdd_cpu_l: DCDC_REG2 { 251 regulator-always-on; 252 regulator-boot-on; 253 regulator-min-microvolt = <750000>; 254 regulator-max-microvolt = <1350000>; 255 regulator-ramp-delay = <6001>; 256 regulator-name = "vdd_cpu_l"; 257 regulator-state-mem { 258 regulator-off-in-suspend; 259 }; 260 }; 261 262 vcc_ddr: DCDC_REG3 { 263 regulator-always-on; 264 regulator-boot-on; 265 regulator-name = "vcc_ddr"; 266 regulator-state-mem { 267 regulator-on-in-suspend; 268 }; 269 }; 270 271 vcc_1v8: DCDC_REG4 { 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-min-microvolt = <1800000>; 275 regulator-max-microvolt = <1800000>; 276 regulator-name = "vcc_1v8"; 277 regulator-state-mem { 278 regulator-on-in-suspend; 279 regulator-suspend-microvolt = <1800000>; 280 }; 281 }; 282 283 vcc_ldo1: LDO_REG1 { 284 regulator-boot-on; 285 regulator-min-microvolt = <1800000>; 286 regulator-max-microvolt = <1800000>; 287 regulator-name = "vcc_ldo1"; 288 regulator-state-mem { 289 regulator-off-in-suspend; 290 }; 291 }; 292 293 vcc1v8_hdmi: LDO_REG2 { 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-min-microvolt = <1800000>; 297 regulator-max-microvolt = <1800000>; 298 regulator-name = "vcc1v8_hdmi"; 299 regulator-state-mem { 300 regulator-off-in-suspend; 301 }; 302 }; 303 304 vcc1v8_pmu: LDO_REG3 { 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <1800000>; 308 regulator-max-microvolt = <1800000>; 309 regulator-name = "vcc1v8_pmu"; 310 regulator-state-mem { 311 regulator-on-in-suspend; 312 regulator-suspend-microvolt = <1800000>; 313 }; 314 }; 315 316 vcc_sd: LDO_REG4 { 317 regulator-always-on; 318 regulator-boot-on; 319 regulator-min-microvolt = <1800000>; 320 regulator-max-microvolt = <3300000>; 321 regulator-name = "vcc_sd"; 322 regulator-state-mem { 323 regulator-on-in-suspend; 324 regulator-suspend-microvolt = <3300000>; 325 }; 326 }; 327 328 vcc_ldo5: LDO_REG5 { 329 regulator-boot-on; 330 regulator-min-microvolt = <3000000>; 331 regulator-max-microvolt = <3000000>; 332 regulator-name = "vcc_ldo5"; 333 regulator-state-mem { 334 regulator-off-in-suspend; 335 }; 336 }; 337 338 vcc_ldo6: LDO_REG6 { 339 regulator-boot-on; 340 regulator-min-microvolt = <1500000>; 341 regulator-max-microvolt = <1500000>; 342 regulator-name = "vcc_ldo6"; 343 regulator-state-mem { 344 regulator-off-in-suspend; 345 }; 346 }; 347 348 vcc0v9_hdmi: LDO_REG7 { 349 regulator-always-on; 350 regulator-boot-on; 351 regulator-min-microvolt = <900000>; 352 regulator-max-microvolt = <900000>; 353 regulator-name = "vcc0v9_hdmi"; 354 regulator-state-mem { 355 regulator-off-in-suspend; 356 }; 357 }; 358 359 vcc_efuse: LDO_REG8 { 360 regulator-always-on; 361 regulator-boot-on; 362 regulator-min-microvolt = <1800000>; 363 regulator-max-microvolt = <1800000>; 364 regulator-name = "vcc_efuse"; 365 regulator-state-mem { 366 regulator-off-in-suspend; 367 }; 368 }; 369 370 vcc3v3_s3: SWITCH_REG1 { 371 regulator-always-on; 372 regulator-boot-on; 373 regulator-name = "vcc3v3_s3"; 374 regulator-state-mem { 375 regulator-off-in-suspend; 376 }; 377 }; 378 379 vcc3v3_s0: SWITCH_REG2 { 380 regulator-always-on; 381 regulator-boot-on; 382 regulator-name = "vcc3v3_s0"; 383 regulator-state-mem { 384 regulator-off-in-suspend; 385 }; 386 }; 387 }; 388 }; 389}; 390 391&i2c8 { 392 status = "okay"; 393 clock-frequency = <400000>; 394 395 vdd_cpu_b: fan53555@60 { 396 compatible = "fcs,fan53555"; 397 reg = <0x60>; 398 vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 399 vin-supply = <&vcc5v0_sys>; 400 regulator-compatible = "fan53555-reg"; 401 regulator-name = "vdd_cpu_b"; 402 regulator-min-microvolt = <600000>; 403 regulator-max-microvolt = <1230000>; 404 regulator-ramp-delay = <1000>; 405 fcs,suspend-voltage-selector = <1>; 406 regulator-always-on; 407 regulator-boot-on; 408 regulator-initial-state = <3>; 409 regulator-state-mem { 410 regulator-off-in-suspend; 411 }; 412 }; 413}; 414 415&i2s0 { 416 status = "okay"; 417 rockchip,i2s-broken-burst-len; 418 rockchip,playback-channels = <8>; 419 rockchip,capture-channels = <8>; 420 #sound-dai-cells = <0>; 421}; 422 423&i2s2 { 424 #sound-dai-cells = <0>; 425 status = "okay"; 426}; 427 428&io_domains { 429 status = "okay"; 430 431 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */ 432 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */ 433 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 434 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */ 435}; 436 437&pcie0 { 438 assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 439 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 440 assigned-clock-rates = <100000000>; 441 ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; 442 num-lanes = <4>; 443 pinctrl-names = "default"; 444 pinctrl-0 = <&pcie_clkreqn>; 445 status = "okay"; 446}; 447 448&pcie_phy { 449 status = "okay"; 450}; 451 452&pmu_io_domains { 453 status = "okay"; 454 pmu1830-supply = <&vcc_1v8>; 455}; 456 457&pwm0 { 458 status = "okay"; 459}; 460 461&pwm2 { 462 status = "okay"; 463}; 464 465&sdhci { 466 bus-width = <8>; 467 mmc-hs400-1_8v; 468 supports-emmc; 469 non-removable; 470 keep-power-in-suspend; 471 mmc-hs400-enhanced-strobe; 472 status = "okay"; 473}; 474 475&sdmmc { 476 u-boot,dm-pre-reloc; 477 clock-frequency = <150000000>; 478 clock-freq-min-max = <100000 150000000>; 479 supports-sd; 480 bus-width = <4>; 481 cap-mmc-highspeed; 482 cap-sd-highspeed; 483 disable-wp; 484 num-slots = <1>; 485 vqmmc-supply = <&vcc_sd>; 486 pinctrl-names = "default"; 487 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 488 status = "okay"; 489}; 490 491&uart2 { 492 status = "okay"; 493}; 494 495&usb_host0_ehci { 496 status = "okay"; 497}; 498 499&usb_host0_ohci { 500 status = "okay"; 501}; 502 503&dwc3_typec0 { 504 status = "disabled"; 505}; 506 507&usb_host1_ehci { 508 status = "okay"; 509}; 510 511&usb_host1_ohci { 512 status = "okay"; 513}; 514 515&dwc3_typec1 { 516 rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>; 517 status = "okay"; 518}; 519 520&vopb { 521 status = "okay"; 522}; 523 524&pinctrl { 525 /* Pins that are not explicitely used by any devices */ 526 pinctrl-names = "default"; 527 pinctrl-0 = <&puma_pin_hog>; 528 hog { 529 puma_pin_hog: puma_pin_hog { 530 rockchip,pins = 531 /* We need pull-ups on Q7 buttons */ 532 <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */ 533 <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */ 534 <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */ 535 <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */ 536 }; 537 }; 538 539 pmic { 540 pmic_int_l: pmic-int-l { 541 rockchip,pins = 542 <1 22 RK_FUNC_GPIO &pcfg_pull_up>; 543 }; 544 }; 545 546 leds_pins_puma: led_pins@0 { 547 rockchip,pins = 548 <2 25 RK_FUNC_GPIO &pcfg_pull_none>, 549 <1 2 RK_FUNC_GPIO &pcfg_pull_none>; 550 }; 551 552 usb2 { 553 otg_vbus_drv: otg-vbus-drv { 554 rockchip,pins = 555 <0 2 RK_FUNC_GPIO &pcfg_pull_none>; 556 }; 557 558 host_vbus_drv: host-vbus-drv { 559 rockchip,pins = 560 <0 2 RK_FUNC_GPIO &pcfg_pull_none>; 561 }; 562 }; 563 564 i2c8 { 565 i2c8_xfer_a: i2c8-xfer { 566 rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>, 567 <1 20 RK_FUNC_1 &pcfg_pull_up>; 568 }; 569 }; 570}; 571 572&i2c1 { 573 status = "okay"; 574 clock-frequency = <400000>; 575}; 576&i2c2 { 577 status = "okay"; 578 clock-frequency = <400000>; 579}; 580&i2c4 { 581 status = "okay"; 582 clock-frequency = <400000>; 583}; 584&i2c6 { 585 status = "okay"; 586 clock-frequency = <400000>; 587}; 588 589&i2c6_xfer { 590 /* Enable pull-ups, the pins would float otherwise. */ 591 rockchip,pins = 592 <2 10 RK_FUNC_2 &pcfg_pull_up>, 593 <2 9 RK_FUNC_2 &pcfg_pull_up>; 594}; 595 596&i2c7 { 597 status = "okay"; 598 clock-frequency = <400000>; 599 600 rtc_twi: rtc@6f { 601 compatible = "isil,isl1208"; 602 reg = <0x6f>; 603 }; 604 fan: fan@18 { 605 compatible = "ti,amc6821"; 606 reg = <0x18>; 607 cooling-min-state = <0>; 608 cooling-max-state = <9>; 609 #cooling-cells = <2>; 610 }; 611}; 612 613&uart0 { 614 u-boot,dm-pre-reloc; 615 pinctrl-names = "default"; 616 pinctrl-0 = <&uart0_xfer &uart0_cts>; 617 status = "okay"; 618}; 619 620 621&spi1 { 622 u-boot,dm-pre-reloc; 623 624 status = "okay"; 625 626 #address-cells = <1>; 627 #size-cells = <0>; 628 629 spiflash: w25q32dw@0 { 630 u-boot,dm-pre-reloc; 631 632 compatible = "spi-flash"; 633 reg = <0>; 634 spi-max-frequency = <49500000>; 635 spi-cpol; 636 spi-cpha; 637 }; 638}; 639 640&spi5 { 641 status = "okay"; 642}; 643 644