xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3399-evb.dts (revision 5821df21ae36d9ef252d346a5abb76be773c5d69)
1/*
2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/dts-v1/;
8#include <dt-bindings/pwm/pwm.h>
9#include <dt-bindings/pinctrl/rockchip.h>
10#include "rk3399.dtsi"
11#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
12
13/ {
14	model = "Rockchip RK3399 Evaluation Board";
15	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
16		     "google,rk3399evb-rev2";
17
18	chosen {
19		stdout-path = &uart2;
20		u-boot,spl-boot-order = &sdhci, &sdmmc;
21	};
22
23	vdd_center: vdd-center {
24		compatible = "pwm-regulator";
25		pwms = <&pwm3 0 25000 1>;
26		regulator-name = "vdd_center";
27		regulator-min-microvolt = <800000>;
28		regulator-max-microvolt = <1400000>;
29		regulator-init-microvolt = <950000>;
30		regulator-always-on;
31		regulator-boot-on;
32		status = "okay";
33	};
34
35	vccsys: vccsys {
36		compatible = "regulator-fixed";
37		regulator-name = "vccsys";
38		regulator-boot-on;
39		regulator-always-on;
40	};
41
42	vcc3v3_sys: vcc3v3-sys {
43		compatible = "regulator-fixed";
44		regulator-name = "vcc3v3_sys";
45		regulator-always-on;
46		regulator-boot-on;
47		regulator-min-microvolt = <3300000>;
48		regulator-max-microvolt = <3300000>;
49	};
50
51	vcc_phy: vcc-phy-regulator {
52		compatible = "regulator-fixed";
53		regulator-name = "vcc_phy";
54		regulator-always-on;
55		regulator-boot-on;
56	};
57
58	vcc5v0_host: vcc5v0-host-en {
59		compatible = "regulator-fixed";
60		regulator-name = "vcc5v0_host";
61		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
62	};
63
64	vcc5v0_typec0: vcc5v0-typec0-en {
65		compatible = "regulator-fixed";
66		regulator-name = "vcc5v0_typec0";
67		gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
68	};
69
70	vcc5v0_typec1: vcc5v0-typec1-en {
71		compatible = "regulator-fixed";
72		regulator-name = "vcc5v0_typec1";
73		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
74	};
75
76	clkin_gmac: external-gmac-clock {
77		compatible = "fixed-clock";
78		clock-frequency = <125000000>;
79		clock-output-names = "clkin_gmac";
80		#clock-cells = <0>;
81	};
82
83	backlight: backlight {
84		compatible = "pwm-backlight";
85		power-supply = <&vccsys>;
86		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
87		brightness-levels = <
88			  0   1   2   3   4   5   6   7
89			  8   9  10  11  12  13  14  15
90			 16  17  18  19  20  21  22  23
91			 24  25  26  27  28  29  30  31
92			 32  33  34  35  36  37  38  39
93			 40  41  42  43  44  45  46  47
94			 48  49  50  51  52  53  54  55
95			 56  57  58  59  60  61  62  63
96			 64  65  66  67  68  69  70  71
97			 72  73  74  75  76  77  78  79
98			 80  81  82  83  84  85  86  87
99			 88  89  90  91  92  93  94  95
100			 96  97  98  99 100 101 102 103
101			104 105 106 107 108 109 110 111
102			112 113 114 115 116 117 118 119
103			120 121 122 123 124 125 126 127
104			128 129 130 131 132 133 134 135
105			136 137 138 139 140 141 142 143
106			144 145 146 147 148 149 150 151
107			152 153 154 155 156 157 158 159
108			160 161 162 163 164 165 166 167
109			168 169 170 171 172 173 174 175
110			176 177 178 179 180 181 182 183
111			184 185 186 187 188 189 190 191
112			192 193 194 195 196 197 198 199
113			200 201 202 203 204 205 206 207
114			208 209 210 211 212 213 214 215
115			216 217 218 219 220 221 222 223
116			224 225 226 227 228 229 230 231
117			232 233 234 235 236 237 238 239
118			240 241 242 243 244 245 246 247
119			248 249 250 251 252 253 254 255>;
120		default-brightness-level = <200>;
121		pwms = <&pwm0 0 25000 0>;
122		pinctrl-names = "default";
123		pinctrl-0 = <&pwm0_pin>;
124		pwm-delay-us = <10000>;
125		status = "disabled";
126	};
127
128	panel:panel {
129		compatible = "simple-panel";
130		power-supply = <&vcc33_lcd>;
131		backlight = <&backlight>;
132		/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
133		status = "disabled";
134	};
135};
136
137&emmc_phy {
138	status = "okay";
139};
140
141&pwm0 {
142	status = "okay";
143};
144
145&pwm2 {
146	status = "okay";
147};
148
149&pwm3 {
150	status = "okay";
151};
152
153&saradc {
154	status = "okay";
155};
156
157&sdmmc {
158	bus-width = <4>;
159	status = "okay";
160};
161
162&sdhci {
163	bus-width = <8>;
164	mmc-hs400-1_8v;
165	mmc-hs400-enhanced-strobe;
166	non-removable;
167	status = "okay";
168};
169
170&uart2 {
171	status = "okay";
172};
173
174&usb_host0_ehci {
175	status = "okay";
176};
177
178&usb_host0_ohci {
179	status = "okay";
180};
181
182&dwc3_typec0 {
183	vbus-supply = <&vcc5v0_typec0>;
184	status = "okay";
185};
186
187&usb_host1_ehci {
188	status = "okay";
189};
190
191&usb_host1_ohci {
192	status = "okay";
193};
194
195&dwc3_typec1 {
196	vbus-supply = <&vcc5v0_typec1>;
197	status = "okay";
198};
199
200&i2c0 {
201	status = "okay";
202	clock-frequency = <400000>;
203	i2c-scl-falling-time-ns = <50>;
204	i2c-scl-rising-time-ns = <100>;
205	u-boot,dm-pre-reloc;
206
207	rk808: pmic@1b {
208		compatible = "rockchip,rk808";
209		clock-output-names = "xin32k", "wifibt_32kin";
210		interrupt-parent = <&gpio0>;
211		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
212		pinctrl-names = "default";
213		pinctrl-0 = <&pmic_int_l>;
214		reg = <0x1b>;
215		rockchip,system-power-controller;
216		#clock-cells = <1>;
217		u-boot,dm-pre-reloc;
218		status = "okay";
219
220		vcc12-supply = <&vcc3v3_sys>;
221
222		regulators {
223			vcc33_lcd: SWITCH_REG2 {
224				regulator-always-on;
225				regulator-boot-on;
226				regulator-name = "vcc33_lcd";
227			};
228		};
229	};
230};
231
232&mipi_dsi {
233	status = "disabled";
234	rockchip,panel = <&panel>;
235	display-timings {
236		timing0 {
237		bits-per-pixel = <24>;
238		clock-frequency = <160000000>;
239		hfront-porch = <120>;
240		hsync-len = <20>;
241		hback-porch = <21>;
242		hactive = <1200>;
243		vfront-porch = <21>;
244		vsync-len = <3>;
245		vback-porch = <18>;
246		vactive = <1920>;
247		hsync-active = <0>;
248		vsync-active = <0>;
249		de-active = <1>;
250		pixelclk-active = <0>;
251		};
252	};
253};
254
255&pinctrl {
256	pmic {
257		pmic_int_l: pmic-int-l {
258			rockchip,pins =
259				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
260		};
261
262		pmic_dvs2: pmic-dvs2 {
263			rockchip,pins =
264				<1 18 RK_FUNC_GPIO &pcfg_pull_down>;
265		};
266	};
267};
268
269&gmac {
270        phy-supply = <&vcc_phy>;
271	phy-mode = "rgmii";
272	clock_in_out = "input";
273	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
274	snps,reset-active-low;
275	snps,reset-delays-us = <0 10000 50000>;
276	assigned-clocks = <&cru SCLK_RMII_SRC>;
277	assigned-clock-parents = <&clkin_gmac>;
278	pinctrl-names = "default";
279	pinctrl-0 = <&rgmii_pins>;
280	tx_delay = <0x10>;
281	rx_delay = <0x10>;
282	status = "okay";
283};
284