xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi (revision 87e4c6020eff05133e40ab8b7b0e37e6a2be37e4)
1/*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
4 * SPDX-License-Identifier:     GPL-2.0+	X11
5 */
6/ {
7	chosen {
8		u-boot,spl-boot-order = &emmc;
9	};
10};
11
12&dmc {
13	u-boot,dm-pre-reloc;
14
15	/*
16	 * PX5-evb(2GB) need to use CBRD mode, or else the dram is not correct
17	 * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
18	 * details on the 'rockchip,memory-schedule' property and how it
19	 * affects the physical-address to device-address mapping.
20	 */
21	rockchip,memory-schedule = <DMC_MSCH_CBRD>;
22	rockchip,ddr-frequency = <800000000>;
23	rockchip,ddr-speed-bin = <DDR3_1600K>;
24
25	status = "okay";
26};
27
28&pinctrl {
29	u-boot,dm-pre-reloc;
30};
31
32&service_msch {
33	u-boot,dm-pre-reloc;
34};
35
36&dmc {
37	u-boot,dm-pre-reloc;
38	status = "okay";
39};
40
41&pmugrf {
42	u-boot,dm-pre-reloc;
43};
44
45&sgrf {
46        u-boot,dm-pre-reloc;
47};
48
49&cru {
50	u-boot,dm-pre-reloc;
51};
52
53&grf {
54	u-boot,dm-pre-reloc;
55};
56
57&uart4 {
58	u-boot,dm-pre-reloc;
59};
60
61&emmc {
62	u-boot,dm-pre-reloc;
63};
64