xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3308-u-boot.dtsi (revision 556bbbe4367a4bc302d7b99160ecfc4eefa35414) 
1/*
2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8
9	chosen {
10		stdout-path = &uart2;
11		u-boot,spl-boot-order = &nandc, &emmc;
12	};
13};
14
15&dmc {
16	u-boot,dm-pre-reloc;
17};
18
19&cru {
20	u-boot,dm-pre-reloc;
21};
22
23&emmc {
24	u-boot,dm-pre-reloc;
25};
26
27&grf {
28	u-boot,dm-pre-reloc;
29};
30
31&nandc {
32	u-boot,dm-pre-reloc;
33	status = "okay";
34	nand@0 {
35		u-boot,dm-spl;
36		reg = <0>;
37		nand-ecc-mode = "hw_syndrome";
38		nand-ecc-strength = <16>;
39		nand-ecc-step-size = <1024>;
40	};
41};
42
43&sfc {
44	u-boot,dm-pre-reloc;
45	status = "okay";
46};
47
48&saradc {
49	u-boot,dm-pre-reloc;
50	status = "okay";
51};
52
53&uart0 {
54	u-boot,dm-pre-reloc;
55};
56
57&uart1 {
58	u-boot,dm-pre-reloc;
59};
60
61&uart2 {
62	u-boot,dm-pre-reloc;
63	clock-frequency = <24000000>;
64	status = "okay";
65};
66
67&uart3 {
68	u-boot,dm-pre-reloc;
69};
70
71&uart4 {
72	u-boot,dm-pre-reloc;
73};
74
75&usb2phy_grf {
76	u-boot,dm-pre-reloc;
77};
78
79&u2phy {
80	u-boot,dm-pre-reloc;
81	status = "okay";
82};
83
84&u2phy_otg {
85	u-boot,dm-pre-reloc;
86	status = "okay";
87};
88
89&usb20_otg {
90	u-boot,dm-pre-reloc;
91	status = "okay";
92};
93
94&route_rgb {
95	status = "disabled";
96};