xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3308-u-boot.dtsi (revision 3a5e7a93e84cf9daaf64cdb8da670e94766e53f7) 
1/*
2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8	aliases {
9		mmc0 = &emmc;
10		mmc1 = &sdmmc;
11	};
12
13	chosen {
14		stdout-path = &uart2;
15		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc;
16	};
17};
18
19&dmc {
20	u-boot,dm-pre-reloc;
21};
22
23&cru {
24	u-boot,dm-pre-reloc;
25};
26
27&emmc {
28	u-boot,dm-pre-reloc;
29};
30
31&grf {
32	u-boot,dm-pre-reloc;
33};
34
35&nandc {
36	u-boot,dm-pre-reloc;
37	status = "okay";
38	#address-cells = <1>;
39	#size-cells = <0>;
40
41	nand@0 {
42		u-boot,dm-spl;
43		reg = <0>;
44		nand-ecc-mode = "hw_syndrome";
45		nand-ecc-strength = <16>;
46		nand-ecc-step-size = <1024>;
47	};
48};
49
50&pinctrl {
51	u-boot,dm-pre-reloc;
52};
53
54&pcfg_pull_none_4ma {
55	u-boot,dm-spl;
56};
57
58&pcfg_pull_up_4ma {
59	u-boot,dm-spl;
60};
61
62&sdmmc {
63	u-boot,dm-pre-reloc;
64};
65
66&sdmmc_pin {
67	u-boot,dm-spl;
68};
69
70&sdmmc_clk {
71	u-boot,dm-spl;
72};
73
74&sdmmc_cmd {
75	u-boot,dm-spl;
76};
77
78&sdmmc_bus4 {
79	u-boot,dm-spl;
80};
81
82&sdmmc_pwren {
83	u-boot,dm-spl;
84};
85
86&sfc {
87	u-boot,dm-pre-reloc;
88	status = "okay";
89
90	#address-cells = <1>;
91	#size-cells = <0>;
92	spi_nand: flash@0 {
93		u-boot,dm-spl;
94		compatible = "spi-nand";
95		reg = <0>;
96		spi-tx-bus-width = <1>;
97		spi-rx-bus-width = <4>;
98		spi-max-frequency = <96000000>;
99	};
100	spi_nor: flash@1 {
101		u-boot,dm-spl;
102		compatible = "jedec,spi-nor";
103		reg = <0>;
104		spi-tx-bus-width = <1>;
105		spi-rx-bus-width = <4>;
106		spi-max-frequency = <96000000>;
107	};
108};
109
110&crypto {
111	u-boot,dm-pre-reloc;
112	status = "okay";
113};
114
115&saradc {
116	u-boot,dm-pre-reloc;
117	status = "okay";
118};
119
120&secure_otp {
121	u-boot,dm-pre-reloc;
122};
123
124&uart0 {
125	u-boot,dm-pre-reloc;
126};
127
128&uart1 {
129	u-boot,dm-pre-reloc;
130};
131
132&uart2 {
133	u-boot,dm-pre-reloc;
134	clock-frequency = <24000000>;
135	status = "okay";
136};
137
138&uart3 {
139	u-boot,dm-pre-reloc;
140};
141
142&uart4 {
143	u-boot,dm-pre-reloc;
144};
145
146&usb2phy_grf {
147	u-boot,dm-pre-reloc;
148};
149
150&u2phy {
151	u-boot,dm-pre-reloc;
152	status = "okay";
153};
154
155&u2phy_otg {
156	u-boot,dm-pre-reloc;
157	status = "okay";
158};
159
160&usb20_otg {
161	u-boot,dm-pre-reloc;
162	status = "okay";
163};
164
165&route_rgb {
166	status = "disabled";
167};
168