xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3308-u-boot.dtsi (revision 2a3fb7bb049d69d96f3bc7dae8caa756fdc8a613) 
1/*
2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8	aliases {
9		mmc0 = &emmc;
10		mmc1 = &sdmmc;
11	};
12
13	chosen {
14		stdout-path = &uart2;
15		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc;
16	};
17};
18
19&dmc {
20	u-boot,dm-pre-reloc;
21};
22
23&cru {
24	u-boot,dm-pre-reloc;
25};
26
27&emmc {
28	u-boot,dm-pre-reloc;
29};
30
31&grf {
32	u-boot,dm-pre-reloc;
33};
34
35&nandc {
36	u-boot,dm-pre-reloc;
37	status = "okay";
38	#address-cells = <1>;
39	#size-cells = <0>;
40
41	nand@0 {
42		u-boot,dm-spl;
43		reg = <0>;
44		nand-ecc-mode = "hw_syndrome";
45		nand-ecc-strength = <16>;
46		nand-ecc-step-size = <1024>;
47	};
48};
49
50&pinctrl {
51	u-boot,dm-pre-reloc;
52};
53
54&pcfg_pull_none_4ma {
55	u-boot,dm-spl;
56};
57
58&pcfg_pull_up_4ma {
59	u-boot,dm-spl;
60};
61
62&sdmmc {
63	u-boot,dm-pre-reloc;
64};
65
66&sdmmc_pin {
67	u-boot,dm-spl;
68};
69
70&sdmmc_clk {
71	u-boot,dm-spl;
72};
73
74&sdmmc_cmd {
75	u-boot,dm-spl;
76};
77
78&sdmmc_bus4 {
79	u-boot,dm-spl;
80};
81
82&sdmmc_pwren {
83	u-boot,dm-spl;
84};
85
86&sfc {
87	u-boot,dm-pre-reloc;
88	status = "okay";
89
90	#address-cells = <1>;
91	#size-cells = <0>;
92	spi_nand: flash@0 {
93		u-boot,dm-spl;
94		compatible = "spi-nand";
95		reg = <0>;
96		spi-tx-bus-width = <1>;
97		spi-rx-bus-width = <4>;
98		spi-max-frequency = <96000000>;
99	};
100	spi_nor: flash@1 {
101		u-boot,dm-spl;
102		compatible = "jedec,spi-nor";
103		label = "sfc_nor";
104		reg = <0>;
105		spi-tx-bus-width = <1>;
106		spi-rx-bus-width = <4>;
107		spi-max-frequency = <96000000>;
108	};
109};
110
111&crypto {
112	u-boot,dm-pre-reloc;
113	status = "okay";
114};
115
116&saradc {
117	u-boot,dm-pre-reloc;
118	status = "okay";
119};
120
121&secure_otp {
122	u-boot,dm-pre-reloc;
123};
124
125&uart0 {
126	u-boot,dm-pre-reloc;
127};
128
129&uart1 {
130	u-boot,dm-pre-reloc;
131};
132
133&uart2 {
134	u-boot,dm-pre-reloc;
135	clock-frequency = <24000000>;
136	status = "okay";
137};
138
139&uart3 {
140	u-boot,dm-pre-reloc;
141};
142
143&uart4 {
144	u-boot,dm-pre-reloc;
145};
146
147&usb2phy_grf {
148	u-boot,dm-pre-reloc;
149};
150
151&u2phy {
152	u-boot,dm-pre-reloc;
153	status = "okay";
154};
155
156&u2phy_otg {
157	u-boot,dm-pre-reloc;
158	status = "okay";
159};
160
161&usb20_otg {
162	u-boot,dm-pre-reloc;
163	status = "okay";
164};
165
166&route_rgb {
167	status = "disabled";
168};
169