1f135c326SAndy Yan/* 2f135c326SAndy Yan * (C) Copyright 2018 Rockchip Electronics Co., Ltd 3f135c326SAndy Yan * 4f135c326SAndy Yan * SPDX-License-Identifier: GPL-2.0+ 5f135c326SAndy Yan */ 6f135c326SAndy Yan 7f135c326SAndy Yan/dts-v1/; 8f135c326SAndy Yan#include "rk3308.dtsi" 9f135c326SAndy Yan#include <dt-bindings/input/input.h> 10c0ef3541SSandy Huang#include <linux/media-bus-format.h> 11f135c326SAndy Yan 12f135c326SAndy Yan/ { 13f135c326SAndy Yan model = "Rockchip RK3308 EVB"; 14f135c326SAndy Yan compatible = "rockchip,rk3308-evb", "rockchip,rk3308"; 15f135c326SAndy Yan 16f135c326SAndy Yan chosen { 17f135c326SAndy Yan stdout-path = "serial2:1500000n8"; 18f135c326SAndy Yan }; 19f135c326SAndy Yan 20df8136f0SDavid Wu adc-keys0 { 21df8136f0SDavid Wu compatible = "adc-keys"; 22df8136f0SDavid Wu io-channels = <&saradc 0>; 23df8136f0SDavid Wu io-channel-names = "buttons"; 24df8136f0SDavid Wu poll-interval = <100>; 25df8136f0SDavid Wu keyup-threshold-microvolt = <1800000>; 26df8136f0SDavid Wu 27df8136f0SDavid Wu vol-up-key { 28df8136f0SDavid Wu linux,code = <KEY_VOLUMEUP>; 29df8136f0SDavid Wu label = "volume up"; 30df8136f0SDavid Wu press-threshold-microvolt = <18000>; 31df8136f0SDavid Wu }; 32df8136f0SDavid Wu }; 33df8136f0SDavid Wu 34df8136f0SDavid Wu adc-keys1 { 35f135c326SAndy Yan compatible = "adc-keys"; 36f135c326SAndy Yan io-channels = <&saradc 1>; 37f135c326SAndy Yan io-channel-names = "buttons"; 38f135c326SAndy Yan poll-interval = <100>; 39f135c326SAndy Yan keyup-threshold-microvolt = <1800000>; 40f135c326SAndy Yan 41f135c326SAndy Yan esc-key { 42f135c326SAndy Yan linux,code = <KEY_MUTE>; 43f135c326SAndy Yan label = "mute"; 44f135c326SAndy Yan press-threshold-microvolt = <1130000>; 45f135c326SAndy Yan }; 46f135c326SAndy Yan 47f135c326SAndy Yan home-key { 48f135c326SAndy Yan linux,code = <KEY_MODE>; 49f135c326SAndy Yan label = "mode"; 50f135c326SAndy Yan press-threshold-microvolt = <901000>; 51f135c326SAndy Yan }; 52f135c326SAndy Yan 53f135c326SAndy Yan menu-key { 54f135c326SAndy Yan linux,code = <KEY_PLAY>; 55f135c326SAndy Yan label = "play"; 56f135c326SAndy Yan press-threshold-microvolt = <624000>; 57f135c326SAndy Yan }; 58f135c326SAndy Yan 59f135c326SAndy Yan vol-down-key { 60f135c326SAndy Yan linux,code = <KEY_VOLUMEDOWN>; 61f135c326SAndy Yan label = "volume down"; 62f135c326SAndy Yan press-threshold-microvolt = <300000>; 63f135c326SAndy Yan }; 64f135c326SAndy Yan 65f135c326SAndy Yan vol-up-key { 66f135c326SAndy Yan linux,code = <KEY_VOLUMEUP>; 67f135c326SAndy Yan label = "volume up"; 68df8136f0SDavid Wu press-threshold-microvolt = <18000>; 69f135c326SAndy Yan }; 70f135c326SAndy Yan }; 71f135c326SAndy Yan 72c0ef3541SSandy Huang backlight: backlight { 73c0ef3541SSandy Huang status = "disabled"; 74c0ef3541SSandy Huang compatible = "pwm-backlight"; 75c0ef3541SSandy Huang pwms = <&pwm1 0 25000 0>; 76c0ef3541SSandy Huang brightness-levels = < 77c0ef3541SSandy Huang 0 1 2 3 4 5 6 7 78c0ef3541SSandy Huang 8 9 10 11 12 13 14 15 79c0ef3541SSandy Huang 16 17 18 19 20 21 22 23 80c0ef3541SSandy Huang 24 25 26 27 28 29 30 31 81c0ef3541SSandy Huang 32 33 34 35 36 37 38 39 82c0ef3541SSandy Huang 40 41 42 43 44 45 46 47 83c0ef3541SSandy Huang 48 49 50 51 52 53 54 55 84c0ef3541SSandy Huang 56 57 58 59 60 61 62 63 85c0ef3541SSandy Huang 64 65 66 67 68 69 70 71 86c0ef3541SSandy Huang 72 73 74 75 76 77 78 79 87c0ef3541SSandy Huang 80 81 82 83 84 85 86 87 88c0ef3541SSandy Huang 88 89 90 91 92 93 94 95 89c0ef3541SSandy Huang 96 97 98 99 100 101 102 103 90c0ef3541SSandy Huang 104 105 106 107 108 109 110 111 91c0ef3541SSandy Huang 112 113 114 115 116 117 118 119 92c0ef3541SSandy Huang 120 121 122 123 124 125 126 127 93c0ef3541SSandy Huang 128 129 130 131 132 133 134 135 94c0ef3541SSandy Huang 136 137 138 139 140 141 142 143 95c0ef3541SSandy Huang 144 145 146 147 148 149 150 151 96c0ef3541SSandy Huang 152 153 154 155 156 157 158 159 97c0ef3541SSandy Huang 160 161 162 163 164 165 166 167 98c0ef3541SSandy Huang 168 169 170 171 172 173 174 175 99c0ef3541SSandy Huang 176 177 178 179 180 181 182 183 100c0ef3541SSandy Huang 184 185 186 187 188 189 190 191 101c0ef3541SSandy Huang 192 193 194 195 196 197 198 199 102c0ef3541SSandy Huang 200 201 202 203 204 205 206 207 103c0ef3541SSandy Huang 208 209 210 211 212 213 214 215 104c0ef3541SSandy Huang 216 217 218 219 220 221 222 223 105c0ef3541SSandy Huang 224 225 226 227 228 229 230 231 106c0ef3541SSandy Huang 232 233 234 235 236 237 238 239 107c0ef3541SSandy Huang 240 241 242 243 244 245 246 247 108c0ef3541SSandy Huang 248 249 250 251 252 253 254 255>; 109c0ef3541SSandy Huang default-brightness-level = <200>; 110c0ef3541SSandy Huang }; 111c0ef3541SSandy Huang 112c0ef3541SSandy Huang panel: panel { 113c0ef3541SSandy Huang compatible = "simple-panel"; 114c0ef3541SSandy Huang bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; 115c0ef3541SSandy Huang backlight = <&backlight>; 116c0ef3541SSandy Huang /* enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; */ 117c0ef3541SSandy Huang enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 118c0ef3541SSandy Huang enable-delay-ms = <20>; 119c0ef3541SSandy Huang reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 120c0ef3541SSandy Huang reset-value = <0>; 121c0ef3541SSandy Huang reset-delay-ms = <10>; 122c0ef3541SSandy Huang prepare-delay-ms = <20>; 123c0ef3541SSandy Huang unprepare-delay-ms = <20>; 124c0ef3541SSandy Huang disable-delay-ms = <20>; 125c0ef3541SSandy Huang /* spi-sdo-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; */ 126c0ef3541SSandy Huang spi-sdi-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; 127c0ef3541SSandy Huang spi-scl-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 128c0ef3541SSandy Huang spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; 129c0ef3541SSandy Huang width-mm = <217>; 130c0ef3541SSandy Huang height-mm = <136>; 131c0ef3541SSandy Huang rockchip,data-mapping = "vesa"; 132c0ef3541SSandy Huang rockchip,data-width = <18>; 133c0ef3541SSandy Huang rockchip,output = "rgb"; 134*b8654f90SSandy Huang rgb-mode = "p666"; 135c0ef3541SSandy Huang status = "disabled"; 136c0ef3541SSandy Huang pinctrl-names = "default"; 137c0ef3541SSandy Huang pinctrl-0 = <&spi_init_cmd>; 138c0ef3541SSandy Huang rockchip,cmd-type = "spi"; 139c0ef3541SSandy Huang 140c0ef3541SSandy Huang /* type:0 is cmd, 1 is data */ 141c0ef3541SSandy Huang panel-init-sequence = [ 142c0ef3541SSandy Huang /* type delay num val1 val2 val3 */ 143c0ef3541SSandy Huang 00 00 01 e0 144c0ef3541SSandy Huang 01 00 01 00 145c0ef3541SSandy Huang 01 00 01 07 146c0ef3541SSandy Huang 01 00 01 0f 147c0ef3541SSandy Huang 01 00 01 0d 148c0ef3541SSandy Huang 01 00 01 1b 149c0ef3541SSandy Huang 01 00 01 0a 150c0ef3541SSandy Huang 01 00 01 3c 151c0ef3541SSandy Huang 01 00 01 78 152c0ef3541SSandy Huang 01 00 01 4a 153c0ef3541SSandy Huang 01 00 01 07 154c0ef3541SSandy Huang 01 00 01 0e 155c0ef3541SSandy Huang 01 00 01 09 156c0ef3541SSandy Huang 01 00 01 1b 157c0ef3541SSandy Huang 01 00 01 1e 158c0ef3541SSandy Huang 01 00 01 0f 159c0ef3541SSandy Huang 00 00 01 e1 160c0ef3541SSandy Huang 01 00 01 00 161c0ef3541SSandy Huang 01 00 01 22 162c0ef3541SSandy Huang 01 00 01 24 163c0ef3541SSandy Huang 01 00 01 06 164c0ef3541SSandy Huang 01 00 01 12 165c0ef3541SSandy Huang 01 00 01 07 166c0ef3541SSandy Huang 01 00 01 36 167c0ef3541SSandy Huang 01 00 01 47 168c0ef3541SSandy Huang 01 00 01 47 169c0ef3541SSandy Huang 01 00 01 06 170c0ef3541SSandy Huang 01 00 01 0a 171c0ef3541SSandy Huang 01 00 01 07 172c0ef3541SSandy Huang 01 00 01 30 173c0ef3541SSandy Huang 01 00 01 37 174c0ef3541SSandy Huang 01 00 01 0f 175c0ef3541SSandy Huang 176c0ef3541SSandy Huang 00 00 01 c0 177c0ef3541SSandy Huang 01 00 01 10 178c0ef3541SSandy Huang 01 00 01 10 179c0ef3541SSandy Huang 180c0ef3541SSandy Huang 00 00 01 c1 181c0ef3541SSandy Huang 01 00 01 41 182c0ef3541SSandy Huang 183c0ef3541SSandy Huang 00 00 01 c5 184c0ef3541SSandy Huang 01 00 01 00 185c0ef3541SSandy Huang 01 00 01 22 186c0ef3541SSandy Huang 01 00 01 80 187c0ef3541SSandy Huang 188c0ef3541SSandy Huang 00 00 01 36 189c0ef3541SSandy Huang 01 00 01 48 190c0ef3541SSandy Huang 191c0ef3541SSandy Huang 00 00 01 3a /* interface mode control */ 192c0ef3541SSandy Huang 01 00 01 66 193c0ef3541SSandy Huang 194c0ef3541SSandy Huang 00 00 01 b0 /* interface mode control */ 195c0ef3541SSandy Huang 01 00 01 00 196c0ef3541SSandy Huang 197c0ef3541SSandy Huang 00 00 01 b1 /* frame rate 70hz */ 198c0ef3541SSandy Huang 01 00 01 b0 199c0ef3541SSandy Huang 01 00 01 11 200c0ef3541SSandy Huang 00 00 01 b4 201c0ef3541SSandy Huang 01 00 01 02 202c0ef3541SSandy Huang 00 00 01 B6 /* RGB/MCU Interface Control */ 203c0ef3541SSandy Huang 01 00 01 32 /* 02 mcu, 32 rgb */ 204c0ef3541SSandy Huang 01 00 01 02 205c0ef3541SSandy Huang 206c0ef3541SSandy Huang 00 00 01 b7 207c0ef3541SSandy Huang 01 00 01 c6 208c0ef3541SSandy Huang 209c0ef3541SSandy Huang 00 00 01 be 210c0ef3541SSandy Huang 01 00 01 00 211c0ef3541SSandy Huang 01 00 01 04 212c0ef3541SSandy Huang 213c0ef3541SSandy Huang 00 00 01 e9 214c0ef3541SSandy Huang 01 00 01 00 215c0ef3541SSandy Huang 216c0ef3541SSandy Huang 00 00 01 f7 217c0ef3541SSandy Huang 01 00 01 a9 218c0ef3541SSandy Huang 01 00 01 51 219c0ef3541SSandy Huang 01 00 01 2c 220c0ef3541SSandy Huang 01 00 01 82 221c0ef3541SSandy Huang 222c0ef3541SSandy Huang 00 78 01 11 223c0ef3541SSandy Huang 00 00 01 29 224c0ef3541SSandy Huang ]; 225c0ef3541SSandy Huang 226c0ef3541SSandy Huang panel-exit-sequence = [ 227c0ef3541SSandy Huang /* type delay num val1 val2 val3 */ 228c0ef3541SSandy Huang 00 0a 01 28 229c0ef3541SSandy Huang 00 78 01 10 230c0ef3541SSandy Huang ]; 231c0ef3541SSandy Huang 232c0ef3541SSandy Huang display-timings { 233c0ef3541SSandy Huang native-mode = <&kd050fwfba002_timing>; 234c0ef3541SSandy Huang 235c0ef3541SSandy Huang kd050fwfba002_timing: timing0 { 236c0ef3541SSandy Huang clock-frequency = <11000000>; 237c0ef3541SSandy Huang hactive = <320>; 238c0ef3541SSandy Huang vactive = <480>; 239c0ef3541SSandy Huang hback-porch = <10>; 240c0ef3541SSandy Huang hfront-porch = <4>; 241c0ef3541SSandy Huang vback-porch = <10>; 242c0ef3541SSandy Huang vfront-porch = <4>; 243c0ef3541SSandy Huang hsync-len = <20>; 244c0ef3541SSandy Huang vsync-len = <20>; 245c0ef3541SSandy Huang hsync-active = <0>; 246c0ef3541SSandy Huang vsync-active = <0>; 247c0ef3541SSandy Huang de-active = <0>; 248c0ef3541SSandy Huang pixelclk-active = <0>; 249c0ef3541SSandy Huang }; 250c0ef3541SSandy Huang }; 251c0ef3541SSandy Huang 252c0ef3541SSandy Huang port { 253c0ef3541SSandy Huang panel_in_rgb: endpoint { 254c0ef3541SSandy Huang remote-endpoint = <&rgb_out_panel>; 255c0ef3541SSandy Huang }; 256c0ef3541SSandy Huang }; 257c0ef3541SSandy Huang }; 258c0ef3541SSandy Huang 2599717771cSAndy Yan vdd_log: vdd_core: vdd-core { 2609717771cSAndy Yan compatible = "pwm-regulator"; 2619717771cSAndy Yan pwms = <&pwm0 0 5000 1>; 2629717771cSAndy Yan regulator-name = "vdd_core"; 2639717771cSAndy Yan regulator-min-microvolt = <847000>; 2649717771cSAndy Yan regulator-max-microvolt = <1366000>; 2659717771cSAndy Yan regulator-init-microvolt = <1044000>; 2669717771cSAndy Yan regulator-always-on; 2679717771cSAndy Yan regulator-boot-on; 2689717771cSAndy Yan status = "okay"; 2699717771cSAndy Yan }; 2709717771cSAndy Yan 271f135c326SAndy Yan}; 272f135c326SAndy Yan 273*b8654f90SSandy Huang&display_subsystem { 274*b8654f90SSandy Huang status = "disabled"; 275*b8654f90SSandy Huang}; 276*b8654f90SSandy Huang 277f135c326SAndy Yan&emmc { 278f135c326SAndy Yan cap-mmc-highspeed; 279f135c326SAndy Yan mmc-hs200-1_8v; 280f135c326SAndy Yan supports-emmc; 281f135c326SAndy Yan non-removable; 282f135c326SAndy Yan num-slots = <1>; 283f135c326SAndy Yan status = "okay"; 284f135c326SAndy Yan}; 285f135c326SAndy Yan 2869717771cSAndy Yan&pwm0 { 2879717771cSAndy Yan status = "okay"; 2889717771cSAndy Yan}; 2899717771cSAndy Yan 290*b8654f90SSandy Huang&pwm1 { 291*b8654f90SSandy Huang status = "disabled"; 292*b8654f90SSandy Huang}; 293*b8654f90SSandy Huang 294f135c326SAndy Yan&saradc { 295f135c326SAndy Yan status = "okay"; 296f135c326SAndy Yan}; 297f135c326SAndy Yan 2987c337686SMeng Dongyang&u2phy { 2997c337686SMeng Dongyang status = "okay"; 3007c337686SMeng Dongyang}; 3017c337686SMeng Dongyang 3027c337686SMeng Dongyang&u2phy_otg { 3037c337686SMeng Dongyang status = "okay"; 3047c337686SMeng Dongyang}; 3057c337686SMeng Dongyang 3067c337686SMeng Dongyang&u2phy_host { 3077c337686SMeng Dongyang status = "okay"; 3087c337686SMeng Dongyang}; 3097c337686SMeng Dongyang 3107c337686SMeng Dongyang&usb_host0_ehci { 3117c337686SMeng Dongyang status = "okay"; 3127c337686SMeng Dongyang}; 3137c337686SMeng Dongyang 3147c337686SMeng Dongyang&usb_host0_ohci { 3157c337686SMeng Dongyang status = "okay"; 3167c337686SMeng Dongyang}; 3177c337686SMeng Dongyang 3187c337686SMeng Dongyang&usb20_otg { 3197c337686SMeng Dongyang status = "okay"; 3207c337686SMeng Dongyang}; 321c0ef3541SSandy Huang 322c0ef3541SSandy Huang&route_rgb { 323c0ef3541SSandy Huang status = "disabled"; 324c0ef3541SSandy Huang}; 325c0ef3541SSandy Huang 326c0ef3541SSandy Huang&vop { 327c0ef3541SSandy Huang status = "disabled"; 328c0ef3541SSandy Huang}; 329c0ef3541SSandy Huang 330c0ef3541SSandy Huang&rgb { 331c0ef3541SSandy Huang status = "disabled"; 332c0ef3541SSandy Huang 333c0ef3541SSandy Huang ports { 334c0ef3541SSandy Huang rgb_out: port@1 { 335c0ef3541SSandy Huang reg = <1>; 336c0ef3541SSandy Huang #address-cells = <1>; 337c0ef3541SSandy Huang #size-cells = <0>; 338c0ef3541SSandy Huang 339c0ef3541SSandy Huang rgb_out_panel: endpoint@0 { 340c0ef3541SSandy Huang reg = <0>; 341c0ef3541SSandy Huang remote-endpoint = <&panel_in_rgb>; 342c0ef3541SSandy Huang }; 343c0ef3541SSandy Huang }; 344c0ef3541SSandy Huang }; 345c0ef3541SSandy Huang}; 346c0ef3541SSandy Huang 347c0ef3541SSandy Huang&pinctrl { 348c0ef3541SSandy Huang spi_panel { 349c0ef3541SSandy Huang spi_init_cmd: spi-init-cmd { 350c0ef3541SSandy Huang rockchip,pins = 351c0ef3541SSandy Huang /* spi sdi */ 352c0ef3541SSandy Huang <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, 353c0ef3541SSandy Huang /* spi scl */ 354c0ef3541SSandy Huang <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, 355c0ef3541SSandy Huang /* spi cs */ 356c0ef3541SSandy Huang <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 357c0ef3541SSandy Huang }; 358c0ef3541SSandy Huang }; 359c0ef3541SSandy Huang}; 360