117aa548cSSimon Glass/* 217aa548cSSimon Glass * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com> 317aa548cSSimon Glass * 417aa548cSSimon Glass * SPDX-License-Identifier: GPL-2.0+ X11 517aa548cSSimon Glass */ 617aa548cSSimon Glass 717aa548cSSimon Glass/dts-v1/; 817aa548cSSimon Glass#include "rk3288-firefly.dtsi" 917aa548cSSimon Glass 1017aa548cSSimon Glass/ { 1117aa548cSSimon Glass model = "Firefly-RK3288"; 1217aa548cSSimon Glass compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; 1317aa548cSSimon Glass 1417aa548cSSimon Glass chosen { 1517aa548cSSimon Glass stdout-path = &uart2; 1617aa548cSSimon Glass }; 1717aa548cSSimon Glass 1817aa548cSSimon Glass config { 1917aa548cSSimon Glass u-boot,dm-pre-reloc; 2017aa548cSSimon Glass u-boot,boot-led = "firefly:green:power"; 2117aa548cSSimon Glass }; 2217aa548cSSimon Glass}; 2317aa548cSSimon Glass 2417aa548cSSimon Glass&dmc { 2517aa548cSSimon Glass rockchip,num-channels = <2>; 2617aa548cSSimon Glass rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa 2717aa548cSSimon Glass 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 2817aa548cSSimon Glass 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 2917aa548cSSimon Glass 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 3017aa548cSSimon Glass 0x5 0x0>; 3117aa548cSSimon Glass rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 3217aa548cSSimon Glass 0xa60 0x40 0x10 0x0>; 33*9ca7e672SSimon Glass /* Add a dummy value to cause of-platdata think this is bytes */ 34*9ca7e672SSimon Glass rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf 0xff>; 3517aa548cSSimon Glass rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; 3617aa548cSSimon Glass}; 3717aa548cSSimon Glass 3817aa548cSSimon Glass&ir { 3917aa548cSSimon Glass gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 4017aa548cSSimon Glass}; 4117aa548cSSimon Glass 4217aa548cSSimon Glass&pinctrl { 4317aa548cSSimon Glass u-boot,dm-pre-reloc; 4417aa548cSSimon Glass act8846 { 4517aa548cSSimon Glass pmic_vsel: pmic-vsel { 4617aa548cSSimon Glass rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>; 4717aa548cSSimon Glass }; 4817aa548cSSimon Glass }; 4917aa548cSSimon Glass 5017aa548cSSimon Glass ir { 5117aa548cSSimon Glass ir_int: ir-int { 5217aa548cSSimon Glass rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>; 5317aa548cSSimon Glass }; 5417aa548cSSimon Glass }; 5517aa548cSSimon Glass}; 5617aa548cSSimon Glass 5717aa548cSSimon Glass&pwm1 { 5817aa548cSSimon Glass status = "okay"; 5917aa548cSSimon Glass}; 6017aa548cSSimon Glass 6117aa548cSSimon Glass&uart2 { 6217aa548cSSimon Glass u-boot,dm-pre-reloc; 6317aa548cSSimon Glass reg-shift = <2>; 6417aa548cSSimon Glass}; 6517aa548cSSimon Glass 6617aa548cSSimon Glass&sdmmc { 6717aa548cSSimon Glass u-boot,dm-pre-reloc; 6817aa548cSSimon Glass}; 6917aa548cSSimon Glass 7017aa548cSSimon Glass&gpio3 { 7117aa548cSSimon Glass u-boot,dm-pre-reloc; 7217aa548cSSimon Glass}; 7317aa548cSSimon Glass 7417aa548cSSimon Glass&gpio8 { 7517aa548cSSimon Glass u-boot,dm-pre-reloc; 7617aa548cSSimon Glass}; 77