xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3288-evb-rk1608.dts (revision 2d1049f50b25c0229adf6e1c312fc9def42eb3d0)
1*2d1049f5SXing Zheng/*
2*2d1049f5SXing Zheng * (C) Copyright 2017 Rockchip Electronics Co., Ltd
3*2d1049f5SXing Zheng *
4*2d1049f5SXing Zheng * SPDX-License-Identifier:     GPL-2.0+ X11
5*2d1049f5SXing Zheng */
6*2d1049f5SXing Zheng
7*2d1049f5SXing Zheng/dts-v1/;
8*2d1049f5SXing Zheng#include "rk3288-evb-rk1608.dtsi"
9*2d1049f5SXing Zheng
10*2d1049f5SXing Zheng/ {
11*2d1049f5SXing Zheng	model = "Evb-RK3288-RK1608";
12*2d1049f5SXing Zheng	compatible = "rockchip,rk3288-evb-rk1608", "rockchip,rk3288";
13*2d1049f5SXing Zheng
14*2d1049f5SXing Zheng	chosen {
15*2d1049f5SXing Zheng		stdout-path = &uart2;
16*2d1049f5SXing Zheng	};
17*2d1049f5SXing Zheng};
18*2d1049f5SXing Zheng
19*2d1049f5SXing Zheng&dmc {
20*2d1049f5SXing Zheng	rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
21*2d1049f5SXing Zheng		0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
22*2d1049f5SXing Zheng		0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
23*2d1049f5SXing Zheng		0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
24*2d1049f5SXing Zheng		0x5 0x0>;
25*2d1049f5SXing Zheng	rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
26*2d1049f5SXing Zheng		0xa60 0x40 0x10 0x0>;
27*2d1049f5SXing Zheng	/* Add a dummy value to cause of-platdata think this is bytes */
28*2d1049f5SXing Zheng	rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
29*2d1049f5SXing Zheng};
30*2d1049f5SXing Zheng
31*2d1049f5SXing Zheng&pinctrl {
32*2d1049f5SXing Zheng	u-boot,dm-pre-reloc;
33*2d1049f5SXing Zheng};
34*2d1049f5SXing Zheng
35*2d1049f5SXing Zheng&pwm1 {
36*2d1049f5SXing Zheng	status = "okay";
37*2d1049f5SXing Zheng};
38*2d1049f5SXing Zheng
39*2d1049f5SXing Zheng&uart2 {
40*2d1049f5SXing Zheng	u-boot,dm-pre-reloc;
41*2d1049f5SXing Zheng	reg-shift = <2>;
42*2d1049f5SXing Zheng};
43*2d1049f5SXing Zheng
44*2d1049f5SXing Zheng&sdmmc {
45*2d1049f5SXing Zheng	u-boot,dm-pre-reloc;
46*2d1049f5SXing Zheng};
47*2d1049f5SXing Zheng
48*2d1049f5SXing Zheng&emmc {
49*2d1049f5SXing Zheng	u-boot,dm-pre-reloc;
50*2d1049f5SXing Zheng};
51*2d1049f5SXing Zheng
52*2d1049f5SXing Zheng&gpio3 {
53*2d1049f5SXing Zheng	u-boot,dm-pre-reloc;
54*2d1049f5SXing Zheng};
55*2d1049f5SXing Zheng
56*2d1049f5SXing Zheng&gpio8 {
57*2d1049f5SXing Zheng	u-boot,dm-pre-reloc;
58*2d1049f5SXing Zheng};
59