xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3128-u-boot.dtsi (revision 6a8f377ca2e7df7257118262bdf7e8e1412915ef) 
1/*
2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8	aliases {
9		mmc0 = &emmc;
10		mmc1 = &sdmmc;
11	};
12
13	chosen {
14		stdout-path = &uart2;
15	};
16};
17
18&psci {
19	u-boot,dm-pre-reloc;
20	status = "okay";
21};
22
23&dmc {
24	u-boot,dm-pre-reloc;
25};
26
27&nandc {
28	u-boot,dm-pre-reloc;
29	status = "okay";
30	#address-cells = <1>;
31	#size-cells = <0>;
32
33	nand@0 {
34		u-boot,dm-spl;
35		reg = <0>;
36		nand-ecc-mode = "hw";
37		nand-ecc-strength = <16>;
38		nand-ecc-step-size = <1024>;
39	};
40};
41
42&sfc {
43	u-boot,dm-pre-reloc;
44	status = "okay";
45};
46
47&emmc {
48	u-boot,dm-pre-reloc;
49	default-sample-phase = <0>;
50	status = "okay";
51};
52
53&grf {
54	u-boot,dm-pre-reloc;
55};
56
57&cru {
58	u-boot,dm-pre-reloc;
59};
60
61&uart1 {
62	clock-frequency = <24000000>;
63	u-boot,dm-pre-reloc;
64};
65
66&uart2 {
67	u-boot,dm-pre-reloc;
68	clock-frequency = <24000000>;
69};
70
71&u2phy {
72	u-boot,dm-pre-reloc;
73	status = "okay";
74};
75
76&u2phy_otg {
77	u-boot,dm-pre-reloc;
78	status = "okay";
79};
80
81&usb_otg {
82	u-boot,dm-pre-reloc;
83	status = "okay";
84};
85