1/* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 9#include "rk3128.dtsi" 10#include "rk3128-u-boot.dtsi" 11 12/ { 13 model = "Rockchip RK3128 Evaluation board"; 14 compatible = "rockchip,rk3128-evb", "rockchip,rk3128"; 15 16 chosen { 17 stdout-path = &uart2; 18 }; 19 20 vcc5v0_otg: vcc5v0-otg-drv { 21 compatible = "regulator-fixed"; 22 regulator-name = "vcc5v0_otg"; 23 gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&otg_vbus_drv>; 26 regulator-min-microvolt = <5000000>; 27 regulator-max-microvolt = <5000000>; 28 }; 29 30 vcc5v0_host: vcc5v0-host-drv { 31 compatible = "regulator-fixed"; 32 regulator-name = "vcc5v0_host"; 33 gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&host_vbus_drv>; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; 38 regulator-always-on; 39 }; 40}; 41 42&i2c1 { 43 status = "okay"; 44 45 hym8563: hym8563@51 { 46 compatible = "haoyu,hym8563"; 47 reg = <0x51>; 48 #clock-cells = <0>; 49 clock-frequency = <32768>; 50 clock-output-names = "xin32k"; 51 }; 52}; 53 54&u2phy { 55 status = "okay"; 56}; 57 58&u2phy_otg { 59 status = "okay"; 60}; 61 62&u2phy_host { 63 status = "okay"; 64}; 65 66&uart2 { 67 clock-frequency = <24000000>; 68 u-boot,dm-pre-reloc; 69 status = "okay"; 70}; 71 72&usb_host_ehci { 73 status = "okay"; 74}; 75 76&usb_host_ohci { 77 status = "okay"; 78}; 79 80&usb_otg { 81 vbus-supply = <&vcc5v0_otg>; 82 status = "okay"; 83}; 84 85&emmc { 86 fifo-mode; 87 status = "okay"; 88}; 89 90&pinctrl { 91 usb_otg { 92 otg_vbus_drv: otg-vbus-drv { 93 rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>; 94 }; 95 }; 96 97 usb_host { 98 host_vbus_drv: host-vbus-drv { 99 rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>; 100 }; 101 }; 102}; 103