xref: /rk3399_rockchip-uboot/arch/arm/dts/px3se-evb.dts (revision 83ab7b4937c098a3febc8f361a6be16f28ae16aa)
1/*
2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/dts-v1/;
8
9#include "rk3128.dtsi"
10#include "rk3128-u-boot.dtsi"
11
12/ {
13	model = "Rockchip PX3SE Evaluation board";
14	compatible = "rockchip,px3se-evb", "rockchip,px3se";
15
16	chosen {
17		stdout-path = &uart1;
18	};
19
20	vcc50_otg: vcc50-otg {
21		compatible = "regulator-fixed";
22		regulator-name = "vcc50_otg";
23		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
24		pinctrl-names = "default";
25		pinctrl-0 = <&otg_drv>;
26		regulator-min-microvolt = <5000000>;
27		regulator-max-microvolt = <5000000>;
28	};
29};
30
31&emmc {
32	fifo-mode;
33	status = "okay";
34};
35
36&u2phy {
37	status = "okay";
38};
39
40&u2phy_otg {
41	status = "okay";
42};
43
44&u2phy_host {
45	status = "okay";
46};
47
48&uart1 {
49	clock-frequency = <24000000>;
50	u-boot,dm-pre-reloc;
51	status = "okay";
52};
53
54&usb_host_ehci {
55	status = "okay";
56};
57
58&usb_host_ohci {
59	status = "okay";
60};
61
62&usb_otg {
63	vbus-supply = <&vcc50_otg>;
64	status = "okay";
65};
66
67&pinctrl {
68	usb_otg {
69		otg_drv: otg-drv {
70			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
71		};
72	};
73};
74