xref: /rk3399_rockchip-uboot/arch/arm/dts/px30-u-boot.dtsi (revision f05ce84792cbd2e5573a414010d421eb8fbb7689) 
1/*
2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8	aliases {
9		mmc0 = &emmc;
10		mmc1 = &sdmmc;
11	};
12
13	chosen {
14		stdout-path = &uart2;
15	};
16};
17
18&dmc {
19	u-boot,dm-pre-reloc;
20};
21
22&uart2 {
23	clock-frequency = <24000000>;
24	u-boot,dm-pre-reloc;
25};
26
27&nandc0 {
28	u-boot,dm-pre-reloc;
29	status = "okay";
30};
31
32&sdmmc {
33	u-boot,dm-pre-reloc;
34};
35
36&emmc {
37	u-boot,dm-pre-reloc;
38};
39
40&pmugrf {
41	u-boot,dm-pre-reloc;
42};
43
44&cru {
45	u-boot,dm-pre-reloc;
46};
47
48&pmucru {
49	u-boot,dm-pre-reloc;
50};
51
52&saradc {
53	u-boot,dm-pre-reloc;
54	status = "okay";
55};
56
57&gpio0 {
58	u-boot,dm-pre-reloc;
59	status = "disabled";
60};
61
62&gpio1 {
63	u-boot,dm-pre-reloc;
64	status = "disabled";
65};
66
67&gpio2 {
68	u-boot,dm-pre-reloc;
69	status = "disabled";
70};
71
72&gpio3 {
73	u-boot,dm-pre-reloc;
74	status = "disabled";
75};
76
77&usb20_otg {
78	u-boot,dm-pre-reloc;
79};
80
81&usb2phy_grf {
82	u-boot,dm-pre-reloc;
83	status = "okay";
84};
85
86&u2phy {
87	u-boot,dm-pre-reloc;
88	status = "okay";
89};
90
91&u2phy_otg {
92	u-boot,dm-pre-reloc;
93	status = "okay";
94};
95