1/* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/ { 8 aliases { 9 mmc0 = &emmc; 10 mmc1 = &sdmmc; 11 }; 12 13 chosen { 14 u-boot,spl-boot-order = &emmc, &sdmmc; 15 stdout-path = &uart2; 16 }; 17}; 18 19&dmc { 20 u-boot,dm-pre-reloc; 21}; 22 23&uart5 { 24 clock-frequency = <24000000>; 25 u-boot,dm-pre-reloc; 26}; 27 28&uart2 { 29 clock-frequency = <24000000>; 30 u-boot,dm-pre-reloc; 31}; 32 33&nandc0 { 34 u-boot,dm-pre-reloc; 35 status = "okay"; 36}; 37 38&sdmmc { 39 u-boot,dm-spl; 40}; 41 42&emmc { 43 u-boot,dm-spl; 44}; 45 46&pmugrf { 47 u-boot,dm-spl; 48}; 49 50&cru { 51 u-boot,dm-spl; 52}; 53 54&crypto { 55 u-boot,dm-spl; 56}; 57 58&pmucru { 59 u-boot,dm-spl; 60}; 61 62&saradc { 63 u-boot,dm-spl; 64 status = "okay"; 65}; 66 67&gpio0 { 68 u-boot,dm-pre-reloc; 69 status = "disabled"; 70}; 71 72&gpio1 { 73 u-boot,dm-pre-reloc; 74 status = "disabled"; 75}; 76 77&gpio2 { 78 u-boot,dm-pre-reloc; 79 status = "disabled"; 80}; 81 82&gpio3 { 83 u-boot,dm-pre-reloc; 84 status = "disabled"; 85}; 86 87&usb20_otg { 88 u-boot,dm-pre-reloc; 89}; 90 91&usb2phy_grf { 92 u-boot,dm-pre-reloc; 93 status = "okay"; 94}; 95 96&u2phy { 97 u-boot,dm-pre-reloc; 98 status = "okay"; 99}; 100 101&u2phy_otg { 102 u-boot,dm-pre-reloc; 103 status = "okay"; 104}; 105 106&sfc { 107 u-boot,dm-spl; 108 /delete-property/ pinctrl-names; 109 /delete-property/ pinctrl-0; 110 /delete-property/ assigned-clocks; 111 /delete-property/ assigned-clock-rates; 112 status = "okay"; 113 114 #address-cells = <1>; 115 #size-cells = <0>; 116 spi_nand: flash@0 { 117 u-boot,dm-spl; 118 compatible = "spi-nand"; 119 reg = <0>; 120 spi-tx-bus-width = <1>; 121 spi-rx-bus-width = <4>; 122 spi-max-frequency = <75000000>; 123 }; 124 125 spi_nor: flash@1 { 126 u-boot,dm-spl; 127 compatible = "jedec,spi-nor"; 128 label = "sfc_nor"; 129 reg = <0>; 130 spi-tx-bus-width = <1>; 131 spi-rx-bus-width = <4>; 132 spi-max-frequency = <100000000>; 133 }; 134}; 135 136&nandc0 { 137 u-boot,dm-pre-reloc; 138 status = "okay"; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 142 nand@0 { 143 u-boot,dm-pre-reloc; 144 reg = <0>; 145 nand-ecc-mode = "hw_syndrome"; 146 nand-ecc-strength = <16>; 147 nand-ecc-step-size = <1024>; 148 }; 149}; 150