1744ba6c6SKever Yang/* 2744ba6c6SKever Yang * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3744ba6c6SKever Yang * 4744ba6c6SKever Yang * SPDX-License-Identifier: GPL-2.0+ 5744ba6c6SKever Yang */ 6744ba6c6SKever Yang 7080fc762SKever Yang/ { 8080fc762SKever Yang aliases { 9080fc762SKever Yang mmc0 = &emmc; 10080fc762SKever Yang mmc1 = &sdmmc; 11080fc762SKever Yang }; 122dd69d66SJoseph Chen 132dd69d66SJoseph Chen chosen { 140c3815dfSKever Yang u-boot,spl-boot-order = &emmc, &sdmmc; 152dd69d66SJoseph Chen stdout-path = &uart2; 162dd69d66SJoseph Chen }; 172dd69d66SJoseph Chen}; 182dd69d66SJoseph Chen 19*73bc89dfSJoseph Chen&psci { 20*73bc89dfSJoseph Chen u-boot,dm-pre-reloc; 21*73bc89dfSJoseph Chen}; 22*73bc89dfSJoseph Chen 232dd69d66SJoseph Chen&dmc { 242dd69d66SJoseph Chen u-boot,dm-pre-reloc; 25080fc762SKever Yang}; 26744ba6c6SKever Yang 27e82920f3SKever Yang&uart5 { 28e82920f3SKever Yang clock-frequency = <24000000>; 29e82920f3SKever Yang u-boot,dm-pre-reloc; 30e82920f3SKever Yang}; 31e82920f3SKever Yang 32744ba6c6SKever Yang&uart2 { 33744ba6c6SKever Yang clock-frequency = <24000000>; 34744ba6c6SKever Yang u-boot,dm-pre-reloc; 35744ba6c6SKever Yang}; 36744ba6c6SKever Yang 379af1ce3cSKever Yang&nandc0 { 38e7f13904SJason Zhu u-boot,dm-pre-reloc; 399af1ce3cSKever Yang status = "okay"; 409af1ce3cSKever Yang}; 419af1ce3cSKever Yang 42080fc762SKever Yang&sdmmc { 430c3815dfSKever Yang u-boot,dm-spl; 44080fc762SKever Yang}; 45080fc762SKever Yang 46744ba6c6SKever Yang&emmc { 470c3815dfSKever Yang u-boot,dm-spl; 48744ba6c6SKever Yang}; 4989f991f8SJoseph Chen 5089f991f8SJoseph Chen&pmugrf { 51e7f13904SJason Zhu u-boot,dm-spl; 5289f991f8SJoseph Chen}; 53bfa33272SKever Yang 54bfa33272SKever Yang&cru { 55e7f13904SJason Zhu u-boot,dm-spl; 56bfa33272SKever Yang}; 5773f99ea8SJoseph Chen 58f8681eaaSLin Jinhan&crypto { 59e7f13904SJason Zhu u-boot,dm-spl; 60f8681eaaSLin Jinhan}; 61f8681eaaSLin Jinhan 62da7f6ae0SFinley Xiao&pmucru { 63e7f13904SJason Zhu u-boot,dm-spl; 64da7f6ae0SFinley Xiao}; 65da7f6ae0SFinley Xiao 66c96295c2SJoseph Chen&saradc { 670c3815dfSKever Yang u-boot,dm-spl; 68c96295c2SJoseph Chen status = "okay"; 69c96295c2SJoseph Chen}; 70c96295c2SJoseph Chen 7178b2d46dSJoseph Chen&gpio0 { 72e7f13904SJason Zhu u-boot,dm-pre-reloc; 7378b2d46dSJoseph Chen status = "disabled"; 7478b2d46dSJoseph Chen}; 7578b2d46dSJoseph Chen 7678b2d46dSJoseph Chen&gpio1 { 77e7f13904SJason Zhu u-boot,dm-pre-reloc; 7878b2d46dSJoseph Chen status = "disabled"; 7978b2d46dSJoseph Chen}; 8078b2d46dSJoseph Chen 8178b2d46dSJoseph Chen&gpio2 { 82e7f13904SJason Zhu u-boot,dm-pre-reloc; 8378b2d46dSJoseph Chen status = "disabled"; 8478b2d46dSJoseph Chen}; 8578b2d46dSJoseph Chen 8678b2d46dSJoseph Chen&gpio3 { 87e7f13904SJason Zhu u-boot,dm-pre-reloc; 8878b2d46dSJoseph Chen status = "disabled"; 8978b2d46dSJoseph Chen}; 900c53cb8fSKever Yang 910c53cb8fSKever Yang&usb20_otg { 92e7f13904SJason Zhu u-boot,dm-pre-reloc; 930c53cb8fSKever Yang}; 940c53cb8fSKever Yang 950c53cb8fSKever Yang&usb2phy_grf { 96e7f13904SJason Zhu u-boot,dm-pre-reloc; 970c53cb8fSKever Yang status = "okay"; 980c53cb8fSKever Yang}; 990c53cb8fSKever Yang 1000c53cb8fSKever Yang&u2phy { 101e7f13904SJason Zhu u-boot,dm-pre-reloc; 1020c53cb8fSKever Yang status = "okay"; 1030c53cb8fSKever Yang}; 1040c53cb8fSKever Yang 1050c53cb8fSKever Yang&u2phy_otg { 106e7f13904SJason Zhu u-boot,dm-pre-reloc; 1070c53cb8fSKever Yang status = "okay"; 1080c53cb8fSKever Yang}; 1092d7abb1bSJon Lin 1102d7abb1bSJon Lin&sfc { 1112d7abb1bSJon Lin u-boot,dm-spl; 1122d7abb1bSJon Lin /delete-property/ pinctrl-names; 1132d7abb1bSJon Lin /delete-property/ pinctrl-0; 1142d7abb1bSJon Lin /delete-property/ assigned-clocks; 1152d7abb1bSJon Lin /delete-property/ assigned-clock-rates; 1162d7abb1bSJon Lin status = "okay"; 1172d7abb1bSJon Lin 1182d7abb1bSJon Lin #address-cells = <1>; 1192d7abb1bSJon Lin #size-cells = <0>; 1202d7abb1bSJon Lin spi_nand: flash@0 { 1212d7abb1bSJon Lin u-boot,dm-spl; 1222d7abb1bSJon Lin compatible = "spi-nand"; 1232d7abb1bSJon Lin reg = <0>; 1242d7abb1bSJon Lin spi-tx-bus-width = <1>; 1252d7abb1bSJon Lin spi-rx-bus-width = <4>; 1262d7abb1bSJon Lin spi-max-frequency = <75000000>; 1272d7abb1bSJon Lin }; 1282d7abb1bSJon Lin 1292d7abb1bSJon Lin spi_nor: flash@1 { 1302d7abb1bSJon Lin u-boot,dm-spl; 1312d7abb1bSJon Lin compatible = "jedec,spi-nor"; 1322d7abb1bSJon Lin label = "sfc_nor"; 1332d7abb1bSJon Lin reg = <0>; 1342d7abb1bSJon Lin spi-tx-bus-width = <1>; 1352d7abb1bSJon Lin spi-rx-bus-width = <4>; 1362d7abb1bSJon Lin spi-max-frequency = <100000000>; 1372d7abb1bSJon Lin }; 1382d7abb1bSJon Lin}; 1392d7abb1bSJon Lin 1402d7abb1bSJon Lin&nandc0 { 141e7f13904SJason Zhu u-boot,dm-pre-reloc; 1422d7abb1bSJon Lin status = "okay"; 1432d7abb1bSJon Lin #address-cells = <1>; 1442d7abb1bSJon Lin #size-cells = <0>; 1452d7abb1bSJon Lin 1462d7abb1bSJon Lin nand@0 { 147e7f13904SJason Zhu u-boot,dm-pre-reloc; 1482d7abb1bSJon Lin reg = <0>; 1492d7abb1bSJon Lin nand-ecc-mode = "hw_syndrome"; 1502d7abb1bSJon Lin nand-ecc-strength = <16>; 1512d7abb1bSJon Lin nand-ecc-step-size = <1024>; 1522d7abb1bSJon Lin }; 1532d7abb1bSJon Lin}; 154