1744ba6c6SKever Yang/* 2744ba6c6SKever Yang * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3744ba6c6SKever Yang * 4744ba6c6SKever Yang * SPDX-License-Identifier: GPL-2.0+ 5744ba6c6SKever Yang */ 6744ba6c6SKever Yang 7080fc762SKever Yang/ { 8080fc762SKever Yang aliases { 9080fc762SKever Yang mmc0 = &emmc; 10080fc762SKever Yang mmc1 = &sdmmc; 11080fc762SKever Yang }; 122dd69d66SJoseph Chen 132dd69d66SJoseph Chen chosen { 140c3815dfSKever Yang u-boot,spl-boot-order = &emmc, &sdmmc; 152dd69d66SJoseph Chen stdout-path = &uart2; 162dd69d66SJoseph Chen }; 172dd69d66SJoseph Chen}; 182dd69d66SJoseph Chen 192dd69d66SJoseph Chen&dmc { 202dd69d66SJoseph Chen u-boot,dm-pre-reloc; 21080fc762SKever Yang}; 22744ba6c6SKever Yang 23e82920f3SKever Yang&uart5 { 24e82920f3SKever Yang clock-frequency = <24000000>; 25e82920f3SKever Yang u-boot,dm-pre-reloc; 26e82920f3SKever Yang}; 27e82920f3SKever Yang 28744ba6c6SKever Yang&uart2 { 29744ba6c6SKever Yang clock-frequency = <24000000>; 30744ba6c6SKever Yang u-boot,dm-pre-reloc; 31744ba6c6SKever Yang}; 32744ba6c6SKever Yang 339af1ce3cSKever Yang&nandc0 { 340c3815dfSKever Yang u-boot,dm-spl; 359af1ce3cSKever Yang status = "okay"; 369af1ce3cSKever Yang}; 379af1ce3cSKever Yang 38080fc762SKever Yang&sdmmc { 390c3815dfSKever Yang u-boot,dm-spl; 40080fc762SKever Yang}; 41080fc762SKever Yang 42744ba6c6SKever Yang&emmc { 430c3815dfSKever Yang u-boot,dm-spl; 44744ba6c6SKever Yang}; 4589f991f8SJoseph Chen 4689f991f8SJoseph Chen&pmugrf { 4789f991f8SJoseph Chen u-boot,dm-pre-reloc; 4889f991f8SJoseph Chen}; 49bfa33272SKever Yang 50bfa33272SKever Yang&cru { 51bfa33272SKever Yang u-boot,dm-pre-reloc; 52bfa33272SKever Yang}; 5373f99ea8SJoseph Chen 54f8681eaaSLin Jinhan&crypto { 55f8681eaaSLin Jinhan u-boot,dm-pre-reloc; 56f8681eaaSLin Jinhan}; 57f8681eaaSLin Jinhan 58da7f6ae0SFinley Xiao&pmucru { 59da7f6ae0SFinley Xiao u-boot,dm-pre-reloc; 60da7f6ae0SFinley Xiao}; 61da7f6ae0SFinley Xiao 62c96295c2SJoseph Chen&saradc { 630c3815dfSKever Yang u-boot,dm-spl; 64c96295c2SJoseph Chen status = "okay"; 65c96295c2SJoseph Chen}; 66c96295c2SJoseph Chen 6778b2d46dSJoseph Chen&gpio0 { 680c3815dfSKever Yang u-boot,dm-spl; 6978b2d46dSJoseph Chen status = "disabled"; 7078b2d46dSJoseph Chen}; 7178b2d46dSJoseph Chen 7278b2d46dSJoseph Chen&gpio1 { 730c3815dfSKever Yang u-boot,dm-spl; 7478b2d46dSJoseph Chen status = "disabled"; 7578b2d46dSJoseph Chen}; 7678b2d46dSJoseph Chen 7778b2d46dSJoseph Chen&gpio2 { 780c3815dfSKever Yang u-boot,dm-spl; 7978b2d46dSJoseph Chen status = "disabled"; 8078b2d46dSJoseph Chen}; 8178b2d46dSJoseph Chen 8278b2d46dSJoseph Chen&gpio3 { 830c3815dfSKever Yang u-boot,dm-spl; 8478b2d46dSJoseph Chen status = "disabled"; 8578b2d46dSJoseph Chen}; 860c53cb8fSKever Yang 870c53cb8fSKever Yang&usb20_otg { 880c3815dfSKever Yang u-boot,dm-spl; 890c53cb8fSKever Yang}; 900c53cb8fSKever Yang 910c53cb8fSKever Yang&usb2phy_grf { 920c3815dfSKever Yang u-boot,dm-spl; 930c53cb8fSKever Yang status = "okay"; 940c53cb8fSKever Yang}; 950c53cb8fSKever Yang 960c53cb8fSKever Yang&u2phy { 970c3815dfSKever Yang u-boot,dm-spl; 980c53cb8fSKever Yang status = "okay"; 990c53cb8fSKever Yang}; 1000c53cb8fSKever Yang 1010c53cb8fSKever Yang&u2phy_otg { 1020c3815dfSKever Yang u-boot,dm-spl; 1030c53cb8fSKever Yang status = "okay"; 1040c53cb8fSKever Yang}; 105*2d7abb1bSJon Lin 106*2d7abb1bSJon Lin&sfc { 107*2d7abb1bSJon Lin u-boot,dm-spl; 108*2d7abb1bSJon Lin /delete-property/ pinctrl-names; 109*2d7abb1bSJon Lin /delete-property/ pinctrl-0; 110*2d7abb1bSJon Lin /delete-property/ assigned-clocks; 111*2d7abb1bSJon Lin /delete-property/ assigned-clock-rates; 112*2d7abb1bSJon Lin status = "okay"; 113*2d7abb1bSJon Lin 114*2d7abb1bSJon Lin #address-cells = <1>; 115*2d7abb1bSJon Lin #size-cells = <0>; 116*2d7abb1bSJon Lin spi_nand: flash@0 { 117*2d7abb1bSJon Lin u-boot,dm-spl; 118*2d7abb1bSJon Lin compatible = "spi-nand"; 119*2d7abb1bSJon Lin reg = <0>; 120*2d7abb1bSJon Lin spi-tx-bus-width = <1>; 121*2d7abb1bSJon Lin spi-rx-bus-width = <4>; 122*2d7abb1bSJon Lin spi-max-frequency = <75000000>; 123*2d7abb1bSJon Lin }; 124*2d7abb1bSJon Lin 125*2d7abb1bSJon Lin spi_nor: flash@1 { 126*2d7abb1bSJon Lin u-boot,dm-spl; 127*2d7abb1bSJon Lin compatible = "jedec,spi-nor"; 128*2d7abb1bSJon Lin label = "sfc_nor"; 129*2d7abb1bSJon Lin reg = <0>; 130*2d7abb1bSJon Lin spi-tx-bus-width = <1>; 131*2d7abb1bSJon Lin spi-rx-bus-width = <4>; 132*2d7abb1bSJon Lin spi-max-frequency = <100000000>; 133*2d7abb1bSJon Lin }; 134*2d7abb1bSJon Lin}; 135*2d7abb1bSJon Lin 136*2d7abb1bSJon Lin&nandc0 { 137*2d7abb1bSJon Lin u-boot,dm-spl; 138*2d7abb1bSJon Lin status = "okay"; 139*2d7abb1bSJon Lin #address-cells = <1>; 140*2d7abb1bSJon Lin #size-cells = <0>; 141*2d7abb1bSJon Lin 142*2d7abb1bSJon Lin nand@0 { 143*2d7abb1bSJon Lin u-boot,dm-spl; 144*2d7abb1bSJon Lin reg = <0>; 145*2d7abb1bSJon Lin nand-ecc-mode = "hw_syndrome"; 146*2d7abb1bSJon Lin nand-ecc-strength = <16>; 147*2d7abb1bSJon Lin nand-ecc-step-size = <1024>; 148*2d7abb1bSJon Lin }; 149*2d7abb1bSJon Lin}; 150