1*f0a3f349SLokesh Vutla/* 2*f0a3f349SLokesh Vutla * Copyright 2014 Texas Instruments, Inc. 3*f0a3f349SLokesh Vutla * 4*f0a3f349SLokesh Vutla * Device Tree Source for K2G SOC 5*f0a3f349SLokesh Vutla * 6*f0a3f349SLokesh Vutla * This program is free software; you can redistribute it and/or modify 7*f0a3f349SLokesh Vutla * it under the terms of the GNU General Public License version 2 as 8*f0a3f349SLokesh Vutla * published by the Free Software Foundation. 9*f0a3f349SLokesh Vutla */ 10*f0a3f349SLokesh Vutla 11*f0a3f349SLokesh Vutla#include <dt-bindings/interrupt-controller/arm-gic.h> 12*f0a3f349SLokesh Vutla#include "skeleton.dtsi" 13*f0a3f349SLokesh Vutla 14*f0a3f349SLokesh Vutla/ { 15*f0a3f349SLokesh Vutla model = "Texas Instruments K2G SoC"; 16*f0a3f349SLokesh Vutla #address-cells = <1>; 17*f0a3f349SLokesh Vutla #size-cells = <1>; 18*f0a3f349SLokesh Vutla interrupt-parent = <&gic>; 19*f0a3f349SLokesh Vutla 20*f0a3f349SLokesh Vutla aliases { 21*f0a3f349SLokesh Vutla serial0 = &uart0; 22*f0a3f349SLokesh Vutla spi0 = &spi0; 23*f0a3f349SLokesh Vutla spi1 = &spi1; 24*f0a3f349SLokesh Vutla spi2 = &spi2; 25*f0a3f349SLokesh Vutla spi3 = &spi3; 26*f0a3f349SLokesh Vutla spi4 = &qspi; 27*f0a3f349SLokesh Vutla }; 28*f0a3f349SLokesh Vutla 29*f0a3f349SLokesh Vutla memory { 30*f0a3f349SLokesh Vutla device_type = "memory"; 31*f0a3f349SLokesh Vutla reg = <0x80000000 0x80000000>; 32*f0a3f349SLokesh Vutla }; 33*f0a3f349SLokesh Vutla 34*f0a3f349SLokesh Vutla cpus { 35*f0a3f349SLokesh Vutla #address-cells = <1>; 36*f0a3f349SLokesh Vutla #size-cells = <0>; 37*f0a3f349SLokesh Vutla 38*f0a3f349SLokesh Vutla interrupt-parent = <&gic>; 39*f0a3f349SLokesh Vutla 40*f0a3f349SLokesh Vutla cpu@0 { 41*f0a3f349SLokesh Vutla compatible = "arm,cortex-a15"; 42*f0a3f349SLokesh Vutla device_type = "cpu"; 43*f0a3f349SLokesh Vutla reg = <0>; 44*f0a3f349SLokesh Vutla }; 45*f0a3f349SLokesh Vutla }; 46*f0a3f349SLokesh Vutla 47*f0a3f349SLokesh Vutla gic: interrupt-controller { 48*f0a3f349SLokesh Vutla compatible = "arm,cortex-a15-gic"; 49*f0a3f349SLokesh Vutla #interrupt-cells = <3>; 50*f0a3f349SLokesh Vutla interrupt-controller; 51*f0a3f349SLokesh Vutla reg = <0x0 0x02561000 0x0 0x1000>, 52*f0a3f349SLokesh Vutla <0x0 0x02562000 0x0 0x2000>, 53*f0a3f349SLokesh Vutla <0x0 0x02564000 0x0 0x1000>, 54*f0a3f349SLokesh Vutla <0x0 0x02566000 0x0 0x2000>; 55*f0a3f349SLokesh Vutla interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 56*f0a3f349SLokesh Vutla IRQ_TYPE_LEVEL_HIGH)>; 57*f0a3f349SLokesh Vutla }; 58*f0a3f349SLokesh Vutla 59*f0a3f349SLokesh Vutla soc { 60*f0a3f349SLokesh Vutla #address-cells = <1>; 61*f0a3f349SLokesh Vutla #size-cells = <1>; 62*f0a3f349SLokesh Vutla compatible = "ti,keystone","simple-bus"; 63*f0a3f349SLokesh Vutla interrupt-parent = <&gic>; 64*f0a3f349SLokesh Vutla ranges; 65*f0a3f349SLokesh Vutla 66*f0a3f349SLokesh Vutla uart0: serial@02530c00 { 67*f0a3f349SLokesh Vutla compatible = "ns16550a"; 68*f0a3f349SLokesh Vutla current-speed = <115200>; 69*f0a3f349SLokesh Vutla reg-shift = <2>; 70*f0a3f349SLokesh Vutla reg-io-width = <4>; 71*f0a3f349SLokesh Vutla reg = <0x02530c00 0x100>; 72*f0a3f349SLokesh Vutla clock-names = "uart"; 73*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; 74*f0a3f349SLokesh Vutla }; 75*f0a3f349SLokesh Vutla 76*f0a3f349SLokesh Vutla mdio: mdio@4200f00 { 77*f0a3f349SLokesh Vutla compatible = "ti,keystone_mdio", "ti,davinci_mdio"; 78*f0a3f349SLokesh Vutla #address-cells = <1>; 79*f0a3f349SLokesh Vutla #size-cells = <0>; 80*f0a3f349SLokesh Vutla /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ 81*f0a3f349SLokesh Vutla /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ 82*f0a3f349SLokesh Vutla clock-names = "fck"; 83*f0a3f349SLokesh Vutla reg = <0x04200f00 0x100>; 84*f0a3f349SLokesh Vutla status = "disabled"; 85*f0a3f349SLokesh Vutla bus_freq = <2500000>; 86*f0a3f349SLokesh Vutla }; 87*f0a3f349SLokesh Vutla 88*f0a3f349SLokesh Vutla qspi: qspi@2940000 { 89*f0a3f349SLokesh Vutla compatible = "cadence,qspi"; 90*f0a3f349SLokesh Vutla #address-cells = <1>; 91*f0a3f349SLokesh Vutla #size-cells = <0>; 92*f0a3f349SLokesh Vutla reg = <0x02940000 0x1000>, 93*f0a3f349SLokesh Vutla <0x24000000 0x4000000>; 94*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; 95*f0a3f349SLokesh Vutla num-cs = <4>; 96*f0a3f349SLokesh Vutla fifo-depth = <256>; 97*f0a3f349SLokesh Vutla sram-size = <256>; 98*f0a3f349SLokesh Vutla status = "disabled"; 99*f0a3f349SLokesh Vutla }; 100*f0a3f349SLokesh Vutla 101*f0a3f349SLokesh Vutla #include "keystone-k2g-netcp.dtsi" 102*f0a3f349SLokesh Vutla 103*f0a3f349SLokesh Vutla pmmc: pmmc@2900000 { 104*f0a3f349SLokesh Vutla compatible = "ti,power-processor"; 105*f0a3f349SLokesh Vutla reg = <0x02900000 0x40000>; 106*f0a3f349SLokesh Vutla ti,lpsc_module = <1>; 107*f0a3f349SLokesh Vutla }; 108*f0a3f349SLokesh Vutla 109*f0a3f349SLokesh Vutla spi0: spi@21805400 { 110*f0a3f349SLokesh Vutla compatible = "ti,keystone-spi", "ti,dm6441-spi"; 111*f0a3f349SLokesh Vutla reg = <0x21805400 0x200>; 112*f0a3f349SLokesh Vutla num-cs = <4>; 113*f0a3f349SLokesh Vutla ti,davinci-spi-intr-line = <0>; 114*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; 115*f0a3f349SLokesh Vutla #address-cells = <1>; 116*f0a3f349SLokesh Vutla #size-cells = <0>; 117*f0a3f349SLokesh Vutla status = "disabled"; 118*f0a3f349SLokesh Vutla }; 119*f0a3f349SLokesh Vutla 120*f0a3f349SLokesh Vutla spi1: spi@21805800 { 121*f0a3f349SLokesh Vutla compatible = "ti,keystone-spi", "ti,dm6441-spi"; 122*f0a3f349SLokesh Vutla reg = <0x21805800 0x200>; 123*f0a3f349SLokesh Vutla num-cs = <4>; 124*f0a3f349SLokesh Vutla ti,davinci-spi-intr-line = <0>; 125*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; 126*f0a3f349SLokesh Vutla #address-cells = <1>; 127*f0a3f349SLokesh Vutla #size-cells = <0>; 128*f0a3f349SLokesh Vutla status = "disabled"; 129*f0a3f349SLokesh Vutla }; 130*f0a3f349SLokesh Vutla 131*f0a3f349SLokesh Vutla spi2: spi@21805c00 { 132*f0a3f349SLokesh Vutla compatible = "ti,keystone-spi", "ti,dm6441-spi"; 133*f0a3f349SLokesh Vutla reg = <0x21805C00 0x200>; 134*f0a3f349SLokesh Vutla num-cs = <4>; 135*f0a3f349SLokesh Vutla ti,davinci-spi-intr-line = <0>; 136*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 137*f0a3f349SLokesh Vutla #address-cells = <1>; 138*f0a3f349SLokesh Vutla #size-cells = <0>; 139*f0a3f349SLokesh Vutla status = "disabled"; 140*f0a3f349SLokesh Vutla }; 141*f0a3f349SLokesh Vutla 142*f0a3f349SLokesh Vutla spi3: spi@21806000 { 143*f0a3f349SLokesh Vutla compatible = "ti,keystone-spi", "ti,dm6441-spi"; 144*f0a3f349SLokesh Vutla reg = <0x21806000 0x200>; 145*f0a3f349SLokesh Vutla num-cs = <4>; 146*f0a3f349SLokesh Vutla ti,davinci-spi-intr-line = <0>; 147*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; 148*f0a3f349SLokesh Vutla #address-cells = <1>; 149*f0a3f349SLokesh Vutla #size-cells = <0>; 150*f0a3f349SLokesh Vutla status = "disabled"; 151*f0a3f349SLokesh Vutla }; 152*f0a3f349SLokesh Vutla 153*f0a3f349SLokesh Vutla mmc0: mmc@23000000 { 154*f0a3f349SLokesh Vutla compatible = "ti,omap4-hsmmc"; 155*f0a3f349SLokesh Vutla reg = <0x23000000 0x400>; 156*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; 157*f0a3f349SLokesh Vutla bus-width = <4>; 158*f0a3f349SLokesh Vutla ti,needs-special-reset; 159*f0a3f349SLokesh Vutla no-1-8-v; 160*f0a3f349SLokesh Vutla max-frequency = <96000000>; 161*f0a3f349SLokesh Vutla status = "disabled"; 162*f0a3f349SLokesh Vutla }; 163*f0a3f349SLokesh Vutla 164*f0a3f349SLokesh Vutla mmc1: mmc@23100000 { 165*f0a3f349SLokesh Vutla compatible = "ti,omap4-hsmmc"; 166*f0a3f349SLokesh Vutla reg = <0x23100000 0x400>; 167*f0a3f349SLokesh Vutla interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; 168*f0a3f349SLokesh Vutla bus-width = <8>; 169*f0a3f349SLokesh Vutla ti,needs-special-reset; 170*f0a3f349SLokesh Vutla ti,non-removable; 171*f0a3f349SLokesh Vutla max-frequency = <96000000>; 172*f0a3f349SLokesh Vutla status = "disabled"; 173*f0a3f349SLokesh Vutla clock-names = "fck"; 174*f0a3f349SLokesh Vutla }; 175*f0a3f349SLokesh Vutla }; 176*f0a3f349SLokesh Vutla}; 177