xref: /rk3399_rockchip-uboot/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts (revision 380e86f361e4e2aef83295972863654fde157560)
1*89a168f7SPriyanka Jain/*
2*89a168f7SPriyanka Jain * NXP ls2080a RDB board device tree source for QSPI-boot
3*89a168f7SPriyanka Jain *
4*89a168f7SPriyanka Jain * Author: Priyanka Jain <priyanka.jain@nxp.com>
5*89a168f7SPriyanka Jain *
6*89a168f7SPriyanka Jain * Copyright 2017 NXP
7*89a168f7SPriyanka Jain *
8*89a168f7SPriyanka Jain * SPDX-License-Identifier:	GPL-2.0+
9*89a168f7SPriyanka Jain */
10*89a168f7SPriyanka Jain
11*89a168f7SPriyanka Jain/dts-v1/;
12*89a168f7SPriyanka Jain
13*89a168f7SPriyanka Jain#include "fsl-ls2080a.dtsi"
14*89a168f7SPriyanka Jain
15*89a168f7SPriyanka Jain/ {
16*89a168f7SPriyanka Jain	model = "Freescale Layerscape 2080a RDB Board";
17*89a168f7SPriyanka Jain	compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
18*89a168f7SPriyanka Jain
19*89a168f7SPriyanka Jain	aliases {
20*89a168f7SPriyanka Jain		spi0 = &qspi;
21*89a168f7SPriyanka Jain		spi1 = &dspi;
22*89a168f7SPriyanka Jain	};
23*89a168f7SPriyanka Jain};
24*89a168f7SPriyanka Jain
25*89a168f7SPriyanka Jain&dspi {
26*89a168f7SPriyanka Jain	bus-num = <0>;
27*89a168f7SPriyanka Jain	status = "okay";
28*89a168f7SPriyanka Jain
29*89a168f7SPriyanka Jain	dflash0: n25q512a {
30*89a168f7SPriyanka Jain		#address-cells = <1>;
31*89a168f7SPriyanka Jain		#size-cells = <1>;
32*89a168f7SPriyanka Jain		compatible = "spi-flash";
33*89a168f7SPriyanka Jain		spi-max-frequency = <3000000>;
34*89a168f7SPriyanka Jain		spi-cpol;
35*89a168f7SPriyanka Jain		spi-cpha;
36*89a168f7SPriyanka Jain		reg = <0>;
37*89a168f7SPriyanka Jain	};
38*89a168f7SPriyanka Jain};
39*89a168f7SPriyanka Jain
40*89a168f7SPriyanka Jain&qspi {
41*89a168f7SPriyanka Jain	bus-num = <0>;
42*89a168f7SPriyanka Jain	status = "okay";
43*89a168f7SPriyanka Jain
44*89a168f7SPriyanka Jain	qflash0: s25fs512s@0 {
45*89a168f7SPriyanka Jain		#address-cells = <1>;
46*89a168f7SPriyanka Jain		#size-cells = <1>;
47*89a168f7SPriyanka Jain		compatible = "spi-flash";
48*89a168f7SPriyanka Jain		spi-max-frequency = <50000000>;
49*89a168f7SPriyanka Jain		reg = <0>;
50*89a168f7SPriyanka Jain	};
51*89a168f7SPriyanka Jain
52*89a168f7SPriyanka Jain	qflash1: s25fs512s@1 {
53*89a168f7SPriyanka Jain		#address-cells = <1>;
54*89a168f7SPriyanka Jain		#size-cells = <1>;
55*89a168f7SPriyanka Jain		compatible = "spi-flash";
56*89a168f7SPriyanka Jain		spi-max-frequency = <50000000>;
57*89a168f7SPriyanka Jain		reg = <1>;
58*89a168f7SPriyanka Jain	};
59*89a168f7SPriyanka Jain};
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