xref: /rk3399_rockchip-uboot/arch/arm/dts/fsl-ls1012a-qds.dtsi (revision dc557e9a1fe00ca9d884bd88feef5bebf23fede4)
1*9d044fcbSPrabhakar Kushwaha/*
2*9d044fcbSPrabhakar Kushwaha * Copyright 2016 Freescale Semiconductor
3*9d044fcbSPrabhakar Kushwaha *
4*9d044fcbSPrabhakar Kushwaha * SPDX-License-Identifier:	GPL-2.0+
5*9d044fcbSPrabhakar Kushwaha */
6*9d044fcbSPrabhakar Kushwaha
7*9d044fcbSPrabhakar Kushwaha/include/ "fsl-ls1012a.dtsi"
8*9d044fcbSPrabhakar Kushwaha
9*9d044fcbSPrabhakar Kushwaha/ {
10*9d044fcbSPrabhakar Kushwaha	model = "LS1012A QDS Board";
11*9d044fcbSPrabhakar Kushwaha	aliases {
12*9d044fcbSPrabhakar Kushwaha		spi0 = &qspi;
13*9d044fcbSPrabhakar Kushwaha		spi1 = &dspi0;
14*9d044fcbSPrabhakar Kushwaha	};
15*9d044fcbSPrabhakar Kushwaha};
16*9d044fcbSPrabhakar Kushwaha
17*9d044fcbSPrabhakar Kushwaha&dspi0 {
18*9d044fcbSPrabhakar Kushwaha	bus-num = <0>;
19*9d044fcbSPrabhakar Kushwaha	status = "okay";
20*9d044fcbSPrabhakar Kushwaha
21*9d044fcbSPrabhakar Kushwaha	dflash0: n25q128a {
22*9d044fcbSPrabhakar Kushwaha		#address-cells = <1>;
23*9d044fcbSPrabhakar Kushwaha		#size-cells = <1>;
24*9d044fcbSPrabhakar Kushwaha		compatible = "spi-flash";
25*9d044fcbSPrabhakar Kushwaha		reg = <0>;
26*9d044fcbSPrabhakar Kushwaha		spi-max-frequency = <1000000>; /* input clock */
27*9d044fcbSPrabhakar Kushwaha	};
28*9d044fcbSPrabhakar Kushwaha
29*9d044fcbSPrabhakar Kushwaha	dflash1: sst25wf040b {
30*9d044fcbSPrabhakar Kushwaha		#address-cells = <1>;
31*9d044fcbSPrabhakar Kushwaha		#size-cells = <1>;
32*9d044fcbSPrabhakar Kushwaha		compatible = "spi-flash";
33*9d044fcbSPrabhakar Kushwaha		spi-max-frequency = <3500000>;
34*9d044fcbSPrabhakar Kushwaha		reg = <1>;
35*9d044fcbSPrabhakar Kushwaha	};
36*9d044fcbSPrabhakar Kushwaha
37*9d044fcbSPrabhakar Kushwaha	dflash2: en25s64 {
38*9d044fcbSPrabhakar Kushwaha		#address-cells = <1>;
39*9d044fcbSPrabhakar Kushwaha		#size-cells = <1>;
40*9d044fcbSPrabhakar Kushwaha		compatible = "spi-flash";
41*9d044fcbSPrabhakar Kushwaha		spi-max-frequency = <3500000>;
42*9d044fcbSPrabhakar Kushwaha		reg = <2>;
43*9d044fcbSPrabhakar Kushwaha	};
44*9d044fcbSPrabhakar Kushwaha};
45*9d044fcbSPrabhakar Kushwaha
46*9d044fcbSPrabhakar Kushwaha&qspi {
47*9d044fcbSPrabhakar Kushwaha	bus-num = <0>;
48*9d044fcbSPrabhakar Kushwaha	status = "okay";
49*9d044fcbSPrabhakar Kushwaha
50*9d044fcbSPrabhakar Kushwaha	qflash0: s25fl128s@0 {
51*9d044fcbSPrabhakar Kushwaha		#address-cells = <1>;
52*9d044fcbSPrabhakar Kushwaha		#size-cells = <1>;
53*9d044fcbSPrabhakar Kushwaha		compatible = "spi-flash";
54*9d044fcbSPrabhakar Kushwaha		spi-max-frequency = <20000000>;
55*9d044fcbSPrabhakar Kushwaha		reg = <0>;
56*9d044fcbSPrabhakar Kushwaha	};
57*9d044fcbSPrabhakar Kushwaha};
58*9d044fcbSPrabhakar Kushwaha
59*9d044fcbSPrabhakar Kushwaha&i2c0 {
60*9d044fcbSPrabhakar Kushwaha	status = "okay";
61*9d044fcbSPrabhakar Kushwaha	pca9547@77 {
62*9d044fcbSPrabhakar Kushwaha		compatible = "philips,pca9547";
63*9d044fcbSPrabhakar Kushwaha		reg = <0x77>;
64*9d044fcbSPrabhakar Kushwaha		#address-cells = <1>;
65*9d044fcbSPrabhakar Kushwaha		#size-cells = <0>;
66*9d044fcbSPrabhakar Kushwaha
67*9d044fcbSPrabhakar Kushwaha		i2c@0 {
68*9d044fcbSPrabhakar Kushwaha			#address-cells = <1>;
69*9d044fcbSPrabhakar Kushwaha			#size-cells = <0>;
70*9d044fcbSPrabhakar Kushwaha			reg = <0x0>;
71*9d044fcbSPrabhakar Kushwaha
72*9d044fcbSPrabhakar Kushwaha			rtc@68 {
73*9d044fcbSPrabhakar Kushwaha				compatible = "dallas,ds3232";
74*9d044fcbSPrabhakar Kushwaha				reg = <0x68>;
75*9d044fcbSPrabhakar Kushwaha				/* IRQ10_B */
76*9d044fcbSPrabhakar Kushwaha				interrupts = <0 150 0x4>;
77*9d044fcbSPrabhakar Kushwaha			};
78*9d044fcbSPrabhakar Kushwaha		};
79*9d044fcbSPrabhakar Kushwaha
80*9d044fcbSPrabhakar Kushwaha		i2c@2 {
81*9d044fcbSPrabhakar Kushwaha			#address-cells = <1>;
82*9d044fcbSPrabhakar Kushwaha			#size-cells = <0>;
83*9d044fcbSPrabhakar Kushwaha			reg = <0x2>;
84*9d044fcbSPrabhakar Kushwaha
85*9d044fcbSPrabhakar Kushwaha			ina220@40 {
86*9d044fcbSPrabhakar Kushwaha				compatible = "ti,ina220";
87*9d044fcbSPrabhakar Kushwaha				reg = <0x40>;
88*9d044fcbSPrabhakar Kushwaha				shunt-resistor = <1000>;
89*9d044fcbSPrabhakar Kushwaha			};
90*9d044fcbSPrabhakar Kushwaha
91*9d044fcbSPrabhakar Kushwaha			ina220@41 {
92*9d044fcbSPrabhakar Kushwaha				compatible = "ti,ina220";
93*9d044fcbSPrabhakar Kushwaha				reg = <0x41>;
94*9d044fcbSPrabhakar Kushwaha				shunt-resistor = <1000>;
95*9d044fcbSPrabhakar Kushwaha			};
96*9d044fcbSPrabhakar Kushwaha		};
97*9d044fcbSPrabhakar Kushwaha
98*9d044fcbSPrabhakar Kushwaha		i2c@3 {
99*9d044fcbSPrabhakar Kushwaha			#address-cells = <1>;
100*9d044fcbSPrabhakar Kushwaha			#size-cells = <0>;
101*9d044fcbSPrabhakar Kushwaha			reg = <0x3>;
102*9d044fcbSPrabhakar Kushwaha
103*9d044fcbSPrabhakar Kushwaha			eeprom@56 {
104*9d044fcbSPrabhakar Kushwaha				compatible = "at24,24c512";
105*9d044fcbSPrabhakar Kushwaha				reg = <0x56>;
106*9d044fcbSPrabhakar Kushwaha			};
107*9d044fcbSPrabhakar Kushwaha
108*9d044fcbSPrabhakar Kushwaha			eeprom@57 {
109*9d044fcbSPrabhakar Kushwaha				compatible = "at24,24c512";
110*9d044fcbSPrabhakar Kushwaha				reg = <0x57>;
111*9d044fcbSPrabhakar Kushwaha			};
112*9d044fcbSPrabhakar Kushwaha
113*9d044fcbSPrabhakar Kushwaha			adt7461a@4c {
114*9d044fcbSPrabhakar Kushwaha				compatible = "adt7461a";
115*9d044fcbSPrabhakar Kushwaha				reg = <0x4c>;
116*9d044fcbSPrabhakar Kushwaha			};
117*9d044fcbSPrabhakar Kushwaha		};
118*9d044fcbSPrabhakar Kushwaha	};
119*9d044fcbSPrabhakar Kushwaha};
120*9d044fcbSPrabhakar Kushwaha
121*9d044fcbSPrabhakar Kushwaha&duart0 {
122*9d044fcbSPrabhakar Kushwaha	status = "okay";
123*9d044fcbSPrabhakar Kushwaha};
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