xref: /rk3399_rockchip-uboot/arch/arm/dts/exynos5420-peach-pit.dts (revision 151b223b9c4e309d65166558afdfa0ce3c3b3213)
1/*
2 * SAMSUNG/GOOGLE Peach-Pit board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 *		http://www.samsung.com
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9
10/dts-v1/;
11#include "exynos54xx.dtsi"
12
13/ {
14	model = "Samsung/Google Peach Pit board based on Exynos5420";
15
16	compatible = "google,pit-rev#", "google,pit",
17		"google,peach", "samsung,exynos5420", "samsung,exynos5";
18
19	config {
20		google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
21		hwid = "PIT TEST A-A 7848";
22		lazy-init = <1>;
23	};
24
25	aliases {
26		serial0 = "/serial@12C30000";
27		console = "/serial@12C30000";
28		pmic = "/i2c@12CA0000";
29		i2c104 = &i2c_tunnel;
30	};
31
32	dmc {
33		mem-manuf = "samsung";
34		mem-type = "ddr3";
35		clock-frequency = <800000000>;
36		arm-frequency = <900000000>;
37	};
38
39	tmu@10060000 {
40		samsung,min-temp	= <25>;
41		samsung,max-temp	= <125>;
42		samsung,start-warning	= <95>;
43		samsung,start-tripping	= <105>;
44		samsung,hw-tripping	= <110>;
45		samsung,efuse-min-value	= <40>;
46		samsung,efuse-value	= <55>;
47		samsung,efuse-max-value	= <100>;
48		samsung,slope		= <274761730>;
49		samsung,dc-value	= <25>;
50	};
51
52	/* MAX77802 is on i2c bus 4 */
53	i2c@12CA0000 {
54		clock-frequency = <400000>;
55		power-regulator@9 {
56			compatible = "maxim,max77802-pmic";
57			reg = <0x9>;
58		};
59	};
60
61	i2c@12CD0000 { /* i2c7 */
62		clock-frequency = <100000>;
63	       soundcodec@20 {
64	              reg = <0x20>;
65	              compatible = "maxim,max98090-codec";
66	       };
67
68	        edp-lvds-bridge@48 {
69	                compatible = "parade,ps8625";
70	                reg = <0x48>;
71			sleep-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
72			reset-gpio = <&gpy7 7 GPIO_ACTIVE_HIGH>;
73	        };
74	};
75
76        sound@3830000 {
77                samsung,codec-type = "max98090";
78        };
79
80	i2c@12E10000 { /* i2c9 */
81		clock-frequency = <400000>;
82                tpm@20 {
83                        compatible = "infineon,slb9645tt";
84                        reg = <0x20>;
85		};
86	};
87
88	spi@12d30000 { /* spi1 */
89		spi-max-frequency = <50000000>;
90		firmware_storage_spi: flash@0 {
91			compatible = "spi-flash";
92			reg = <0>;
93
94			/*
95			 * A region for the kernel to store a panic event
96			 * which the firmware will add to the log.
97			*/
98			elog-panic-event-offset = <0x01e00000 0x100000>;
99
100			elog-shrink-size = <0x400>;
101			elog-full-threshold = <0xc00>;
102		};
103	};
104
105	xhci@12000000 {
106		samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
107	};
108
109	xhci@12400000 {
110		samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
111	};
112
113	fimd@14400000 {
114		samsung,vl-freq = <60>;
115		samsung,vl-col = <1366>;
116		samsung,vl-row = <768>;
117		samsung,vl-width = <1366>;
118		samsung,vl-height = <768>;
119
120		samsung,vl-clkp;
121		samsung,vl-dp;
122		samsung,vl-bpix = <4>;
123
124		samsung,vl-hspw = <32>;
125		samsung,vl-hbpd = <40>;
126		samsung,vl-hfpd = <40>;
127		samsung,vl-vspw = <6>;
128		samsung,vl-vbpd = <10>;
129		samsung,vl-vfpd = <12>;
130		samsung,vl-cmd-allow-len = <0xf>;
131
132		samsung,winid = <3>;
133		samsung,interface-mode = <1>;
134		samsung,dp-enabled = <1>;
135		samsung,dual-lcd-enabled = <0>;
136	};
137};
138
139&spi_2 {
140	spi-max-frequency = <3125000>;
141	spi-deactivate-delay = <200>;
142	status = "okay";
143	num-cs = <1>;
144	samsung,spi-src-clk = <0>;
145	cs-gpios = <&gpb1 2 0>;
146
147	cros_ec: cros-ec@0 {
148		compatible = "google,cros-ec-spi";
149		interrupt-parent = <&gpx1>;
150		interrupts = <5 0>;
151		reg = <0>;
152		spi-half-duplex;
153		spi-max-timeout-ms = <1100>;
154		ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
155		#address-cells = <1>;
156		#size-cells = <1>;
157
158		/*
159		 * This describes the flash memory within the EC. Note
160		 * that the STM32L flash erases to 0, not 0xff.
161		 */
162		flash@8000000 {
163			reg = <0x08000000 0x20000>;
164			erase-value = <0>;
165		};
166
167		controller-data {
168			samsung,spi-feedback-delay = <1>;
169		};
170
171		i2c_tunnel: i2c-tunnel {
172			compatible = "google,cros-ec-i2c-tunnel";
173			#address-cells = <1>;
174			#size-cells = <0>;
175			google,remote-bus = <0>;
176
177			battery: sbs-battery@b {
178				compatible = "sbs,sbs-battery";
179				reg = <0xb>;
180				sbs,poll-retry-count = <1>;
181				sbs,i2c-retry-count = <2>;
182			};
183
184			power-regulator@48 {
185				compatible = "ti,tps65090";
186				reg = <0x48>;
187
188				regulators {
189					tps65090_dcdc1: dcdc1 {
190						ti,enable-ext-control;
191					};
192					tps65090_dcdc2: dcdc2 {
193						ti,enable-ext-control;
194					};
195					tps65090_dcdc3: dcdc3 {
196						ti,enable-ext-control;
197					};
198					tps65090_fet1: fet1 {
199						regulator-name = "vcd_led";
200					};
201					tps65090_fet2: fet2 {
202						regulator-name = "video_mid";
203						regulator-always-on;
204					};
205					tps65090_fet3: fet3 {
206						regulator-name = "wwan_r";
207						regulator-always-on;
208					};
209					tps65090_fet4: fet4 {
210						regulator-name = "sdcard";
211						regulator-always-on;
212					};
213					tps65090_fet5: fet5 {
214						regulator-name = "camout";
215						regulator-always-on;
216					};
217					tps65090_fet6: fet6 {
218						regulator-name = "lcd_vdd";
219					};
220					tps65090_fet7: fet7 {
221						regulator-name = "video_mid_1a";
222						regulator-always-on;
223					};
224					tps65090_ldo1: ldo1 {
225					};
226					tps65090_ldo2: ldo2 {
227					};
228				};
229
230				charger {
231					compatible = "ti,tps65090-charger";
232				};
233			};
234		};
235	};
236};
237
238#include "cros-ec-keyboard.dtsi"
239