1*57cd681bSTom Rini/* 2*57cd681bSTom Rini * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3*57cd681bSTom Rini * 4*57cd681bSTom Rini * This program is free software; you can redistribute it and/or modify 5*57cd681bSTom Rini * it under the terms of the GNU General Public License version 2 as 6*57cd681bSTom Rini * published by the Free Software Foundation. 7*57cd681bSTom Rini * Based on "omap4.dtsi" 8*57cd681bSTom Rini */ 9*57cd681bSTom Rini 10*57cd681bSTom Rini#include "dra7.dtsi" 11*57cd681bSTom Rini 12*57cd681bSTom Rini/ { 13*57cd681bSTom Rini compatible = "ti,dra722", "ti,dra72", "ti,dra7"; 14*57cd681bSTom Rini 15*57cd681bSTom Rini cpus { 16*57cd681bSTom Rini #address-cells = <1>; 17*57cd681bSTom Rini #size-cells = <0>; 18*57cd681bSTom Rini 19*57cd681bSTom Rini cpu0: cpu@0 { 20*57cd681bSTom Rini device_type = "cpu"; 21*57cd681bSTom Rini compatible = "arm,cortex-a15"; 22*57cd681bSTom Rini reg = <0>; 23*57cd681bSTom Rini 24*57cd681bSTom Rini /* cooling options */ 25*57cd681bSTom Rini cooling-min-level = <0>; 26*57cd681bSTom Rini cooling-max-level = <2>; 27*57cd681bSTom Rini #cooling-cells = <2>; /* min followed by max */ 28*57cd681bSTom Rini }; 29*57cd681bSTom Rini }; 30*57cd681bSTom Rini 31*57cd681bSTom Rini pmu { 32*57cd681bSTom Rini compatible = "arm,cortex-a15-pmu"; 33*57cd681bSTom Rini interrupt-parent = <&wakeupgen>; 34*57cd681bSTom Rini interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 35*57cd681bSTom Rini }; 36*57cd681bSTom Rini}; 37*57cd681bSTom Rini 38*57cd681bSTom Rini&dss { 39*57cd681bSTom Rini reg = <0x58000000 0x80>, 40*57cd681bSTom Rini <0x58004054 0x4>, 41*57cd681bSTom Rini <0x58004300 0x20>; 42*57cd681bSTom Rini reg-names = "dss", "pll1_clkctrl", "pll1"; 43*57cd681bSTom Rini 44*57cd681bSTom Rini clocks = <&dss_dss_clk>, 45*57cd681bSTom Rini <&dss_video1_clk>; 46*57cd681bSTom Rini clock-names = "fck", "video1_clk"; 47*57cd681bSTom Rini}; 48