1850db82fSStefan Roese/* 2850db82fSStefan Roese * Device Tree file for Marvell Armada 3720 development board 3850db82fSStefan Roese * (DB-88F3720-DDR3) 4850db82fSStefan Roese * Copyright (C) 2016 Marvell 5850db82fSStefan Roese * 6850db82fSStefan Roese * Gregory CLEMENT <gregory.clement@free-electrons.com> 7850db82fSStefan Roese * 8850db82fSStefan Roese * This file is dual-licensed: you can use it either under the terms 9850db82fSStefan Roese * of the GPL or the X11 license, at your option. Note that this dual 10850db82fSStefan Roese * licensing only applies to this file, and not this project as a 11850db82fSStefan Roese * whole. 12850db82fSStefan Roese * 13850db82fSStefan Roese * a) This file is free software; you can redistribute it and/or 14850db82fSStefan Roese * modify it under the terms of the GNU General Public License as 15850db82fSStefan Roese * published by the Free Software Foundation; either version 2 of the 16850db82fSStefan Roese * License, or (at your option) any later version. 17850db82fSStefan Roese * 18850db82fSStefan Roese * This file is distributed in the hope that it will be useful 19850db82fSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 20850db82fSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21850db82fSStefan Roese * GNU General Public License for more details. 22850db82fSStefan Roese * 23850db82fSStefan Roese * Or, alternatively 24850db82fSStefan Roese * 25850db82fSStefan Roese * b) Permission is hereby granted, free of charge, to any person 26850db82fSStefan Roese * obtaining a copy of this software and associated documentation 27850db82fSStefan Roese * files (the "Software"), to deal in the Software without 28850db82fSStefan Roese * restriction, including without limitation the rights to use 29850db82fSStefan Roese * copy, modify, merge, publish, distribute, sublicense, and/or 30850db82fSStefan Roese * sell copies of the Software, and to permit persons to whom the 31850db82fSStefan Roese * Software is furnished to do so, subject to the following 32850db82fSStefan Roese * conditions: 33850db82fSStefan Roese * 34850db82fSStefan Roese * The above copyright notice and this permission notice shall be 35850db82fSStefan Roese * included in all copies or substantial portions of the Software. 36850db82fSStefan Roese * 37850db82fSStefan Roese * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 38850db82fSStefan Roese * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 39850db82fSStefan Roese * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 40850db82fSStefan Roese * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 41850db82fSStefan Roese * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 42850db82fSStefan Roese * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 43850db82fSStefan Roese * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 44850db82fSStefan Roese * OTHER DEALINGS IN THE SOFTWARE. 45850db82fSStefan Roese */ 46850db82fSStefan Roese 47850db82fSStefan Roese/dts-v1/; 48850db82fSStefan Roese 49850db82fSStefan Roese#include "armada-372x.dtsi" 50850db82fSStefan Roese 51850db82fSStefan Roese/ { 52850db82fSStefan Roese model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3"; 53850db82fSStefan Roese compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710"; 54850db82fSStefan Roese 55850db82fSStefan Roese chosen { 56850db82fSStefan Roese stdout-path = "serial0:115200n8"; 57850db82fSStefan Roese }; 58850db82fSStefan Roese 59cdccf9c1SStefan Roese aliases { 603f84e2e8SStefan Roese ethernet0 = ð0; 619e9e63c0SStefan Roese i2c0 = &i2c0; 62cdccf9c1SStefan Roese spi0 = &spi0; 63cdccf9c1SStefan Roese }; 64cdccf9c1SStefan Roese 65850db82fSStefan Roese memory { 66850db82fSStefan Roese device_type = "memory"; 67850db82fSStefan Roese reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 68850db82fSStefan Roese }; 69850db82fSStefan Roese}; 70850db82fSStefan Roese 7156d53956SStefan Roese&comphy { 7256d53956SStefan Roese phy0 { 7356d53956SStefan Roese phy-type = <PHY_TYPE_PEX0>; 7456d53956SStefan Roese phy-speed = <PHY_SPEED_2_5G>; 7556d53956SStefan Roese }; 7656d53956SStefan Roese 7756d53956SStefan Roese phy1 { 7856d53956SStefan Roese phy-type = <PHY_TYPE_USB3_HOST0>; 7956d53956SStefan Roese phy-speed = <PHY_SPEED_5G>; 8056d53956SStefan Roese }; 8156d53956SStefan Roese}; 8256d53956SStefan Roese 833f84e2e8SStefan Roeseð0 { 84*045504bbSGregory CLEMENT pinctrl-names = "default"; 85*045504bbSGregory CLEMENT pinctrl-0 = <&rgmii_pins>; 863f84e2e8SStefan Roese status = "okay"; 873f84e2e8SStefan Roese phy-mode = "rgmii"; 883f84e2e8SStefan Roese}; 893f84e2e8SStefan Roese 909e9e63c0SStefan Roese&i2c0 { 91*045504bbSGregory CLEMENT pinctrl-names = "default"; 92*045504bbSGregory CLEMENT pinctrl-0 = <&i2c1_pins>; 939e9e63c0SStefan Roese status = "okay"; 949e9e63c0SStefan Roese}; 959e9e63c0SStefan Roese 96850db82fSStefan Roese/* CON3 */ 97850db82fSStefan Roese&sata { 98850db82fSStefan Roese status = "okay"; 99850db82fSStefan Roese}; 100850db82fSStefan Roese 10122074fc5SStefan Roese&sdhci0 { 10222074fc5SStefan Roese bus-width = <4>; 10322074fc5SStefan Roese status = "okay"; 10422074fc5SStefan Roese}; 10522074fc5SStefan Roese 10622074fc5SStefan Roese&sdhci1 { 10722074fc5SStefan Roese non-removable; 10822074fc5SStefan Roese bus-width = <8>; 10922074fc5SStefan Roese mmc-ddr-1_8v; 11022074fc5SStefan Roese mmc-hs400-1_8v; 11122074fc5SStefan Roese marvell,pad-type = "fixed-1-8v"; 11222074fc5SStefan Roese status = "okay"; 11322074fc5SStefan Roese 11422074fc5SStefan Roese #address-cells = <1>; 11522074fc5SStefan Roese #size-cells = <0>; 11622074fc5SStefan Roese mmccard: mmccard@0 { 11722074fc5SStefan Roese compatible = "mmc-card"; 11822074fc5SStefan Roese reg = <0>; 11922074fc5SStefan Roese }; 12022074fc5SStefan Roese}; 12122074fc5SStefan Roese 122cdccf9c1SStefan Roese&spi0 { 123cdccf9c1SStefan Roese status = "okay"; 124*045504bbSGregory CLEMENT pinctrl-names = "default"; 125*045504bbSGregory CLEMENT pinctrl-0 = <&spi_quad_pins>; 126cdccf9c1SStefan Roese 127cdccf9c1SStefan Roese spi-flash@0 { 128cdccf9c1SStefan Roese #address-cells = <1>; 129cdccf9c1SStefan Roese #size-cells = <1>; 130cdccf9c1SStefan Roese compatible = "st,m25p128", "spi-flash"; 131cdccf9c1SStefan Roese reg = <0>; /* Chip select 0 */ 132cdccf9c1SStefan Roese spi-max-frequency = <50000000>; 133cdccf9c1SStefan Roese m25p,fast-read; 134cdccf9c1SStefan Roese }; 135cdccf9c1SStefan Roese}; 136cdccf9c1SStefan Roese 137850db82fSStefan Roese/* Exported on the micro USB connector CON32 through an FTDI */ 138850db82fSStefan Roese&uart0 { 139*045504bbSGregory CLEMENT pinctrl-names = "default"; 140*045504bbSGregory CLEMENT pinctrl-0 = <&uart1_pins>; 141850db82fSStefan Roese status = "okay"; 142850db82fSStefan Roese}; 143850db82fSStefan Roese 144f733228aSStefan Roese/* CON29 */ 145f733228aSStefan Roese&usb2 { 146f733228aSStefan Roese status = "okay"; 147f733228aSStefan Roese}; 148f733228aSStefan Roese 149850db82fSStefan Roese/* CON31 */ 150850db82fSStefan Roese&usb3 { 151850db82fSStefan Roese status = "okay"; 152850db82fSStefan Roese}; 153