xref: /rk3399_rockchip-uboot/arch/arm/cpu/u-boot-spl.lds (revision 65cdd6430ed026484bfb9dc67fcc587b85212eb4)
1*65cdd643SAlbert ARIBAUD/*
2*65cdd643SAlbert ARIBAUD * Copyright (c) 2004-2008 Texas Instruments
3*65cdd643SAlbert ARIBAUD *
4*65cdd643SAlbert ARIBAUD * (C) Copyright 2002
5*65cdd643SAlbert ARIBAUD * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6*65cdd643SAlbert ARIBAUD *
7*65cdd643SAlbert ARIBAUD * See file CREDITS for list of people who contributed to this
8*65cdd643SAlbert ARIBAUD * project.
9*65cdd643SAlbert ARIBAUD *
10*65cdd643SAlbert ARIBAUD * This program is free software; you can redistribute it and/or
11*65cdd643SAlbert ARIBAUD * modify it under the terms of the GNU General Public License as
12*65cdd643SAlbert ARIBAUD * published by the Free Software Foundation; either version 2 of
13*65cdd643SAlbert ARIBAUD * the License, or (at your option) any later version.
14*65cdd643SAlbert ARIBAUD *
15*65cdd643SAlbert ARIBAUD * This program is distributed in the hope that it will be useful,
16*65cdd643SAlbert ARIBAUD * but WITHOUT ANY WARRANTY; without even the implied warranty of
17*65cdd643SAlbert ARIBAUD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18*65cdd643SAlbert ARIBAUD * GNU General Public License for more details.
19*65cdd643SAlbert ARIBAUD *
20*65cdd643SAlbert ARIBAUD * You should have received a copy of the GNU General Public License
21*65cdd643SAlbert ARIBAUD * along with this program; if not, write to the Free Software
22*65cdd643SAlbert ARIBAUD * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23*65cdd643SAlbert ARIBAUD * MA 02111-1307 USA
24*65cdd643SAlbert ARIBAUD */
25*65cdd643SAlbert ARIBAUD
26*65cdd643SAlbert ARIBAUDOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
27*65cdd643SAlbert ARIBAUDOUTPUT_ARCH(arm)
28*65cdd643SAlbert ARIBAUDENTRY(_start)
29*65cdd643SAlbert ARIBAUDSECTIONS
30*65cdd643SAlbert ARIBAUD{
31*65cdd643SAlbert ARIBAUD	. = 0x00000000;
32*65cdd643SAlbert ARIBAUD
33*65cdd643SAlbert ARIBAUD	. = ALIGN(4);
34*65cdd643SAlbert ARIBAUD	.text :
35*65cdd643SAlbert ARIBAUD	{
36*65cdd643SAlbert ARIBAUD		__image_copy_start = .;
37*65cdd643SAlbert ARIBAUD		CPUDIR/start.o (.text*)
38*65cdd643SAlbert ARIBAUD		*(.text*)
39*65cdd643SAlbert ARIBAUD	}
40*65cdd643SAlbert ARIBAUD
41*65cdd643SAlbert ARIBAUD	. = ALIGN(4);
42*65cdd643SAlbert ARIBAUD	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
43*65cdd643SAlbert ARIBAUD
44*65cdd643SAlbert ARIBAUD	. = ALIGN(4);
45*65cdd643SAlbert ARIBAUD	.data : {
46*65cdd643SAlbert ARIBAUD		*(.data*)
47*65cdd643SAlbert ARIBAUD	}
48*65cdd643SAlbert ARIBAUD
49*65cdd643SAlbert ARIBAUD	. = ALIGN(4);
50*65cdd643SAlbert ARIBAUD
51*65cdd643SAlbert ARIBAUD	. = .;
52*65cdd643SAlbert ARIBAUD
53*65cdd643SAlbert ARIBAUD	__image_copy_end = .;
54*65cdd643SAlbert ARIBAUD
55*65cdd643SAlbert ARIBAUD	.rel.dyn : {
56*65cdd643SAlbert ARIBAUD		__rel_dyn_start = .;
57*65cdd643SAlbert ARIBAUD		*(.rel*)
58*65cdd643SAlbert ARIBAUD		__rel_dyn_end = .;
59*65cdd643SAlbert ARIBAUD	}
60*65cdd643SAlbert ARIBAUD
61*65cdd643SAlbert ARIBAUD	.dynsym : {
62*65cdd643SAlbert ARIBAUD		__dynsym_start = .;
63*65cdd643SAlbert ARIBAUD		*(.dynsym)
64*65cdd643SAlbert ARIBAUD	}
65*65cdd643SAlbert ARIBAUD
66*65cdd643SAlbert ARIBAUD	_end = .;
67*65cdd643SAlbert ARIBAUD
68*65cdd643SAlbert ARIBAUD	/*
69*65cdd643SAlbert ARIBAUD	 * Deprecated: this MMU section is used by pxa at present but
70*65cdd643SAlbert ARIBAUD	 * should not be used by new boards/CPUs.
71*65cdd643SAlbert ARIBAUD	 */
72*65cdd643SAlbert ARIBAUD	. = ALIGN(4096);
73*65cdd643SAlbert ARIBAUD	.mmutable : {
74*65cdd643SAlbert ARIBAUD		*(.mmutable)
75*65cdd643SAlbert ARIBAUD	}
76*65cdd643SAlbert ARIBAUD
77*65cdd643SAlbert ARIBAUD	.bss __rel_dyn_start (OVERLAY) : {
78*65cdd643SAlbert ARIBAUD		__bss_start = .;
79*65cdd643SAlbert ARIBAUD		*(.bss*)
80*65cdd643SAlbert ARIBAUD		 . = ALIGN(4);
81*65cdd643SAlbert ARIBAUD		__bss_end__ = .;
82*65cdd643SAlbert ARIBAUD	}
83*65cdd643SAlbert ARIBAUD
84*65cdd643SAlbert ARIBAUD	/DISCARD/ : { *(.dynstr*) }
85*65cdd643SAlbert ARIBAUD	/DISCARD/ : { *(.dynamic*) }
86*65cdd643SAlbert ARIBAUD	/DISCARD/ : { *(.plt*) }
87*65cdd643SAlbert ARIBAUD	/DISCARD/ : { *(.interp*) }
88*65cdd643SAlbert ARIBAUD	/DISCARD/ : { *(.gnu*) }
89*65cdd643SAlbert ARIBAUD}
90*65cdd643SAlbert ARIBAUD
91*65cdd643SAlbert ARIBAUD#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE)
92*65cdd643SAlbert ARIBAUDASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big");
93*65cdd643SAlbert ARIBAUD#endif
94