xref: /rk3399_rockchip-uboot/arch/arm/cpu/sa1100/cpu.c (revision cd6cc3440f3f8166b0ceda3c510786d8fcd64dff)
184ad6884SPeter Tyser /*
284ad6884SPeter Tyser  * (C) Copyright 2002
384ad6884SPeter Tyser  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
484ad6884SPeter Tyser  * Marius Groeger <mgroeger@sysgo.de>
584ad6884SPeter Tyser  *
684ad6884SPeter Tyser  * (C) Copyright 2002
784ad6884SPeter Tyser  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
884ad6884SPeter Tyser  * Alex Zuepke <azu@sysgo.de>
984ad6884SPeter Tyser  *
101a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
1184ad6884SPeter Tyser  */
1284ad6884SPeter Tyser 
1384ad6884SPeter Tyser /*
1484ad6884SPeter Tyser  * CPU specific code
1584ad6884SPeter Tyser  */
1684ad6884SPeter Tyser 
1784ad6884SPeter Tyser #include <common.h>
1884ad6884SPeter Tyser #include <command.h>
1984ad6884SPeter Tyser #include <asm/system.h>
20*cd6cc344SAlbert ARIBAUD #include <asm/io.h>
2184ad6884SPeter Tyser 
2284ad6884SPeter Tyser #ifdef CONFIG_USE_IRQ
2384ad6884SPeter Tyser DECLARE_GLOBAL_DATA_PTR;
2484ad6884SPeter Tyser #endif
2584ad6884SPeter Tyser 
2684ad6884SPeter Tyser static void cache_flush(void);
2784ad6884SPeter Tyser 
2884ad6884SPeter Tyser int cleanup_before_linux (void)
2984ad6884SPeter Tyser {
3084ad6884SPeter Tyser 	/*
3184ad6884SPeter Tyser 	 * this function is called just before we call linux
3284ad6884SPeter Tyser 	 * it prepares the processor for linux
3384ad6884SPeter Tyser 	 *
3484ad6884SPeter Tyser 	 * just disable everything that can disturb booting linux
3584ad6884SPeter Tyser 	 */
3684ad6884SPeter Tyser 
3784ad6884SPeter Tyser 	disable_interrupts ();
3884ad6884SPeter Tyser 
3984ad6884SPeter Tyser 	/* turn off I-cache */
4084ad6884SPeter Tyser 	icache_disable();
4184ad6884SPeter Tyser 	dcache_disable();
4284ad6884SPeter Tyser 
4384ad6884SPeter Tyser 	/* flush I-cache */
4484ad6884SPeter Tyser 	cache_flush();
4584ad6884SPeter Tyser 
4684ad6884SPeter Tyser 	return (0);
4784ad6884SPeter Tyser }
4884ad6884SPeter Tyser 
4984ad6884SPeter Tyser /* flush I/D-cache */
5084ad6884SPeter Tyser static void cache_flush (void)
5184ad6884SPeter Tyser {
5284ad6884SPeter Tyser 	unsigned long i = 0;
5384ad6884SPeter Tyser 
5484ad6884SPeter Tyser 	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
5584ad6884SPeter Tyser }
56*cd6cc344SAlbert ARIBAUD 
57*cd6cc344SAlbert ARIBAUD #define RST_BASE 0x90030000
58*cd6cc344SAlbert ARIBAUD #define RSRR	0x00
59*cd6cc344SAlbert ARIBAUD #define RCSR	0x04
60*cd6cc344SAlbert ARIBAUD 
61*cd6cc344SAlbert ARIBAUD __attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
62*cd6cc344SAlbert ARIBAUD {
63*cd6cc344SAlbert ARIBAUD 	/* repeat endlessly */
64*cd6cc344SAlbert ARIBAUD 	while (1) {
65*cd6cc344SAlbert ARIBAUD 		writel(0, RST_BASE + RCSR);
66*cd6cc344SAlbert ARIBAUD 		writel(1, RST_BASE + RSRR);
67*cd6cc344SAlbert ARIBAUD 	}
68*cd6cc344SAlbert ARIBAUD }
69