xref: /rk3399_rockchip-uboot/arch/arm/cpu/armv8/zynqmp/spl.c (revision 935e09cdcb6d6dfa41f4cd8c8a69da52ef6850ed)
1 /*
2  * Copyright 2015 - 2016 Xilinx, Inc.
3  *
4  * Michal Simek <michal.simek@xilinx.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <debug_uart.h>
11 #include <spl.h>
12 
13 #include <asm/io.h>
14 #include <asm/spl.h>
15 #include <asm/arch/hardware.h>
16 #include <asm/arch/sys_proto.h>
17 
18 void board_init_f(ulong dummy)
19 {
20 	psu_init();
21 	board_early_init_r();
22 
23 #ifdef CONFIG_DEBUG_UART
24 	/* Uart debug for sure */
25 	debug_uart_init();
26 	puts("Debug uart enabled\n"); /* or printch() */
27 #endif
28 	/* Delay is required for clocks to be propagated */
29 	udelay(1000000);
30 
31 	/* Clear the BSS */
32 	memset(__bss_start, 0, __bss_end - __bss_start);
33 
34 	/* No need to call timer init - it is empty for ZynqMP */
35 	board_init_r(NULL, 0);
36 }
37 
38 static void ps_mode_reset(ulong mode)
39 {
40 	writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
41 	       &crlapb_base->boot_pin_ctrl);
42 	udelay(5);
43 	writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
44 	       mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
45 	       &crlapb_base->boot_pin_ctrl);
46 }
47 
48 /*
49  * Set default PS_MODE1 which is used for USB ULPI phy reset
50  * Also other resets can be connected to this certain pin
51  */
52 #ifndef MODE_RESET
53 # define MODE_RESET	PS_MODE1
54 #endif
55 
56 #ifdef CONFIG_SPL_BOARD_INIT
57 void spl_board_init(void)
58 {
59 	preloader_console_init();
60 	ps_mode_reset(MODE_RESET);
61 	board_init();
62 }
63 #endif
64 
65 u32 spl_boot_device(void)
66 {
67 	u32 reg = 0;
68 	u8 bootmode;
69 
70 #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
71 	/* Change default boot mode at run-time */
72 	writel(BOOT_MODE_USE_ALT |
73 	       CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
74 	       &crlapb_base->boot_mode);
75 #endif
76 
77 	reg = readl(&crlapb_base->boot_mode);
78 	bootmode = reg & BOOT_MODES_MASK;
79 
80 	switch (bootmode) {
81 	case JTAG_MODE:
82 		return BOOT_DEVICE_RAM;
83 #ifdef CONFIG_SPL_MMC_SUPPORT
84 	case EMMC_MODE:
85 	case SD_MODE:
86 	case SD_MODE1:
87 		return BOOT_DEVICE_MMC1;
88 #endif
89 #ifdef CONFIG_SPL_DFU_SUPPORT
90 	case USB_MODE:
91 		return BOOT_DEVICE_DFU;
92 #endif
93 	default:
94 		printf("Invalid Boot Mode:0x%x\n", bootmode);
95 		break;
96 	}
97 
98 	return 0;
99 }
100 
101 u32 spl_boot_mode(const u32 boot_device)
102 {
103 	switch (spl_boot_device()) {
104 	case BOOT_DEVICE_RAM:
105 		return 0;
106 	case BOOT_DEVICE_MMC1:
107 		return MMCSD_MODE_FS;
108 	default:
109 		puts("spl: error: unsupported device\n");
110 		hang();
111 	}
112 }
113 
114 __weak void psu_init(void)
115 {
116 	 /*
117 	  * This function is overridden by the one in
118 	  * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
119 	  */
120 }
121 
122 #ifdef CONFIG_SPL_OS_BOOT
123 int spl_start_uboot(void)
124 {
125 	return 0;
126 }
127 #endif
128 
129 #ifdef CONFIG_SPL_LOAD_FIT
130 int board_fit_config_name_match(const char *name)
131 {
132 	/* Just empty function now - can't decide what to choose */
133 	debug("%s: %s\n", __func__, name);
134 
135 	return 0;
136 }
137 #endif
138