184c7204bSMichal Simek /* 284c7204bSMichal Simek * (C) Copyright 2014 - 2015 Xilinx, Inc. 384c7204bSMichal Simek * Michal Simek <michal.simek@xilinx.com> 484c7204bSMichal Simek * 584c7204bSMichal Simek * SPDX-License-Identifier: GPL-2.0+ 684c7204bSMichal Simek */ 784c7204bSMichal Simek 884c7204bSMichal Simek #include <common.h> 916247d28SMichal Simek #include <asm/arch/clk.h> 1084c7204bSMichal Simek #include <asm/arch/hardware.h> 1184c7204bSMichal Simek #include <asm/arch/sys_proto.h> 1284c7204bSMichal Simek 1384c7204bSMichal Simek DECLARE_GLOBAL_DATA_PTR; 1484c7204bSMichal Simek zynqmp_get_system_timer_freq(void)15*0785dfd8SMichal Simekunsigned long zynqmp_get_system_timer_freq(void) 16*0785dfd8SMichal Simek { 17*0785dfd8SMichal Simek u32 ver = zynqmp_get_silicon_version(); 18*0785dfd8SMichal Simek 19*0785dfd8SMichal Simek switch (ver) { 20*0785dfd8SMichal Simek case ZYNQMP_CSU_VERSION_VELOCE: 21*0785dfd8SMichal Simek return 10000; 22*0785dfd8SMichal Simek case ZYNQMP_CSU_VERSION_EP108: 23*0785dfd8SMichal Simek return 4000000; 24*0785dfd8SMichal Simek case ZYNQMP_CSU_VERSION_QEMU: 25*0785dfd8SMichal Simek return 50000000; 26*0785dfd8SMichal Simek } 27*0785dfd8SMichal Simek 28*0785dfd8SMichal Simek return 100000000; 29*0785dfd8SMichal Simek } 30*0785dfd8SMichal Simek 3184c7204bSMichal Simek #ifdef CONFIG_CLOCKS 3284c7204bSMichal Simek /** 3384c7204bSMichal Simek * set_cpu_clk_info() - Initialize clock framework 3484c7204bSMichal Simek * Always returns zero. 3584c7204bSMichal Simek * 3684c7204bSMichal Simek * This function is called from common code after relocation and sets up the 3784c7204bSMichal Simek * clock framework. The framework must not be used before this function had been 3884c7204bSMichal Simek * called. 3984c7204bSMichal Simek */ set_cpu_clk_info(void)4084c7204bSMichal Simekint set_cpu_clk_info(void) 4184c7204bSMichal Simek { 4284c7204bSMichal Simek gd->cpu_clk = get_tbclk(); 4384c7204bSMichal Simek 4484c7204bSMichal Simek /* Support Veloce to show at least 1MHz via bdi */ 4584c7204bSMichal Simek if (gd->cpu_clk > 1000000) 4684c7204bSMichal Simek gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; 4784c7204bSMichal Simek else 4884c7204bSMichal Simek gd->bd->bi_arm_freq = 1; 4984c7204bSMichal Simek 5084c7204bSMichal Simek gd->bd->bi_dsp_freq = 0; 5184c7204bSMichal Simek 5284c7204bSMichal Simek return 0; 5384c7204bSMichal Simek } 5484c7204bSMichal Simek #endif 55