1*18cd75b9SJoseph Chen/* 2*18cd75b9SJoseph Chen * (C) Copyright 2025 Rockchip Electronics Co., Ltd. 3*18cd75b9SJoseph Chen * 4*18cd75b9SJoseph Chen * SPDX-License-Identifier: GPL-2.0+ 5*18cd75b9SJoseph Chen */ 6*18cd75b9SJoseph Chen 7*18cd75b9SJoseph Chen#include <asm/macro.h> 8*18cd75b9SJoseph Chen#include <asm-offsets.h> 9*18cd75b9SJoseph Chen#include <config.h> 10*18cd75b9SJoseph Chen#include <linux/linkage.h> 11*18cd75b9SJoseph Chen 12*18cd75b9SJoseph Chen .globl __spin_lock 13*18cd75b9SJoseph Chen .globl __spin_unlock 14*18cd75b9SJoseph Chen 15*18cd75b9SJoseph Chen/* 16*18cd75b9SJoseph Chen * Acquire lock using load-/store-exclusive instruction pair. 17*18cd75b9SJoseph Chen * 18*18cd75b9SJoseph Chen * void __spin_lock(spinlock_t *lock); 19*18cd75b9SJoseph Chen */ 20*18cd75b9SJoseph ChenENTRY(__spin_lock) 21*18cd75b9SJoseph Chen mov w2, #1 22*18cd75b9SJoseph Chen sevl 23*18cd75b9SJoseph Chenl1: wfe 24*18cd75b9SJoseph Chenl2: ldaxr w1, [x0] 25*18cd75b9SJoseph Chen cbnz w1, l1 26*18cd75b9SJoseph Chen stxr w1, w2, [x0] 27*18cd75b9SJoseph Chen cbnz w1, l2 28*18cd75b9SJoseph Chen ret 29*18cd75b9SJoseph ChenENDPROC(__spin_lock) 30*18cd75b9SJoseph Chen 31*18cd75b9SJoseph Chen/* 32*18cd75b9SJoseph Chen * Release lock previously acquired by __spin_lock. 33*18cd75b9SJoseph Chen * 34*18cd75b9SJoseph Chen * Use store-release to unconditionally clear the spinlock variable. 35*18cd75b9SJoseph Chen * Store operation generates an event to all cores waiting in WFE 36*18cd75b9SJoseph Chen * when address is monitored by the global monitor. 37*18cd75b9SJoseph Chen * 38*18cd75b9SJoseph Chen * void __spin_unlock(spinlock_t *lock); 39*18cd75b9SJoseph Chen */ 40*18cd75b9SJoseph ChenENTRY(__spin_unlock) 41*18cd75b9SJoseph Chen stlr wzr, [x0] 42*18cd75b9SJoseph Chen ret 43*18cd75b9SJoseph ChenENDPROC(__spin_unlock) 44