xref: /rk3399_rockchip-uboot/arch/arm/cpu/armv8/s32v234/cpu.c (revision 9702ec00e95dbc1fd66ef8e9624c649e1ee818e5)
1*9702ec00SEddy Petrișor /*
2*9702ec00SEddy Petrișor  * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
3*9702ec00SEddy Petrișor  *
4*9702ec00SEddy Petrișor  * SPDX-License-Identifier:	GPL-2.0+
5*9702ec00SEddy Petrișor  */
6*9702ec00SEddy Petrișor 
7*9702ec00SEddy Petrișor #include <common.h>
8*9702ec00SEddy Petrișor #include <asm/io.h>
9*9702ec00SEddy Petrișor #include <asm/system.h>
10*9702ec00SEddy Petrișor #include <asm/armv8/mmu.h>
11*9702ec00SEddy Petrișor #include <asm/io.h>
12*9702ec00SEddy Petrișor #include <asm/arch/mc_me_regs.h>
13*9702ec00SEddy Petrișor #include "cpu.h"
14*9702ec00SEddy Petrișor 
15*9702ec00SEddy Petrișor DECLARE_GLOBAL_DATA_PTR;
16*9702ec00SEddy Petrișor 
17*9702ec00SEddy Petrișor u32 cpu_mask(void)
18*9702ec00SEddy Petrișor {
19*9702ec00SEddy Petrișor 	return readl(MC_ME_CS);
20*9702ec00SEddy Petrișor }
21*9702ec00SEddy Petrișor 
22*9702ec00SEddy Petrișor #ifndef CONFIG_SYS_DCACHE_OFF
23*9702ec00SEddy Petrișor 
24*9702ec00SEddy Petrișor #define S32V234_IRAM_BASE        0x3e800000UL
25*9702ec00SEddy Petrișor #define S32V234_IRAM_SIZE        0x800000UL
26*9702ec00SEddy Petrișor #define S32V234_DRAM_BASE1       0x80000000UL
27*9702ec00SEddy Petrișor #define S32V234_DRAM_SIZE1       0x40000000UL
28*9702ec00SEddy Petrișor #define S32V234_DRAM_BASE2       0xC0000000UL
29*9702ec00SEddy Petrișor #define S32V234_DRAM_SIZE2       0x20000000UL
30*9702ec00SEddy Petrișor #define S32V234_PERIPH_BASE      0x40000000UL
31*9702ec00SEddy Petrișor #define S32V234_PERIPH_SIZE      0x40000000UL
32*9702ec00SEddy Petrișor 
33*9702ec00SEddy Petrișor static struct mm_region s32v234_mem_map[] = {
34*9702ec00SEddy Petrișor 	{
35*9702ec00SEddy Petrișor 		.base = S32V234_IRAM_BASE,
36*9702ec00SEddy Petrișor 		.size = S32V234_IRAM_SIZE,
37*9702ec00SEddy Petrișor 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
38*9702ec00SEddy Petrișor 			 PTE_BLOCK_OUTER_SHARE
39*9702ec00SEddy Petrișor 	}, {
40*9702ec00SEddy Petrișor 		.base = S32V234_DRAM_BASE1,
41*9702ec00SEddy Petrișor 		.size = S32V234_DRAM_SIZE1,
42*9702ec00SEddy Petrișor 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
43*9702ec00SEddy Petrișor 			 PTE_BLOCK_OUTER_SHARE
44*9702ec00SEddy Petrișor 	}, {
45*9702ec00SEddy Petrișor 		.base = S32V234_PERIPH_BASE,
46*9702ec00SEddy Petrișor 		.size = S32V234_PERIPH_SIZE,
47*9702ec00SEddy Petrișor 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
48*9702ec00SEddy Petrișor 			 PTE_BLOCK_NON_SHARE
49*9702ec00SEddy Petrișor 			 /* TODO: Do we need these? */
50*9702ec00SEddy Petrișor 			 /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
51*9702ec00SEddy Petrișor 	}, {
52*9702ec00SEddy Petrișor 		.base = S32V234_DRAM_BASE2,
53*9702ec00SEddy Petrișor 		.size = S32V234_DRAM_SIZE2,
54*9702ec00SEddy Petrișor 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
55*9702ec00SEddy Petrișor 			 PTE_BLOCK_OUTER_SHARE
56*9702ec00SEddy Petrișor 	}, {
57*9702ec00SEddy Petrișor 		/* List terminator */
58*9702ec00SEddy Petrișor 		0,
59*9702ec00SEddy Petrișor 	}
60*9702ec00SEddy Petrișor };
61*9702ec00SEddy Petrișor 
62*9702ec00SEddy Petrișor struct mm_region *mem_map = s32v234_mem_map;
63*9702ec00SEddy Petrișor 
64*9702ec00SEddy Petrișor #endif
65*9702ec00SEddy Petrișor 
66*9702ec00SEddy Petrișor /*
67*9702ec00SEddy Petrișor  * Return the number of cores on this SOC.
68*9702ec00SEddy Petrișor  */
69*9702ec00SEddy Petrișor int cpu_numcores(void)
70*9702ec00SEddy Petrișor {
71*9702ec00SEddy Petrișor 	int numcores;
72*9702ec00SEddy Petrișor 	u32 mask;
73*9702ec00SEddy Petrișor 
74*9702ec00SEddy Petrișor 	mask = cpu_mask();
75*9702ec00SEddy Petrișor 	numcores = hweight32(cpu_mask());
76*9702ec00SEddy Petrișor 
77*9702ec00SEddy Petrișor 	/* Verify if M4 is deactivated */
78*9702ec00SEddy Petrișor 	if (mask & 0x1)
79*9702ec00SEddy Petrișor 		numcores--;
80*9702ec00SEddy Petrișor 
81*9702ec00SEddy Petrișor 	return numcores;
82*9702ec00SEddy Petrișor }
83*9702ec00SEddy Petrișor 
84*9702ec00SEddy Petrișor #if defined(CONFIG_ARCH_EARLY_INIT_R)
85*9702ec00SEddy Petrișor int arch_early_init_r(void)
86*9702ec00SEddy Petrișor {
87*9702ec00SEddy Petrișor 	int rv;
88*9702ec00SEddy Petrișor 	asm volatile ("dsb sy");
89*9702ec00SEddy Petrișor 	rv = fsl_s32v234_wake_seconday_cores();
90*9702ec00SEddy Petrișor 
91*9702ec00SEddy Petrișor 	if (rv)
92*9702ec00SEddy Petrișor 		printf("Did not wake secondary cores\n");
93*9702ec00SEddy Petrișor 
94*9702ec00SEddy Petrișor 	asm volatile ("sev");
95*9702ec00SEddy Petrișor 	return 0;
96*9702ec00SEddy Petrișor }
97*9702ec00SEddy Petrișor #endif /* CONFIG_ARCH_EARLY_INIT_R */
98