xref: /rk3399_rockchip-uboot/arch/arm/cpu/armv8/cpu-dt.c (revision 4f66e09bb9fbc47b73f67c3cc08ee2663e8fcdb1)
145684ae3SHou Zhiqiang /*
245684ae3SHou Zhiqiang  * Copyright 2016 NXP Semiconductor, Inc.
345684ae3SHou Zhiqiang  *
445684ae3SHou Zhiqiang  * SPDX-License-Identifier:	GPL-2.0+
545684ae3SHou Zhiqiang  */
645684ae3SHou Zhiqiang 
745684ae3SHou Zhiqiang #include <common.h>
845684ae3SHou Zhiqiang #include <asm/psci.h>
99a561753Smacro.wave.z@gmail.com #include <asm/system.h>
1045684ae3SHou Zhiqiang #include <asm/armv8/sec_firmware.h>
1145684ae3SHou Zhiqiang 
12*026f30ecSYuantian Tang #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
psci_update_dt(void * fdt)1345684ae3SHou Zhiqiang int psci_update_dt(void *fdt)
1445684ae3SHou Zhiqiang {
1545684ae3SHou Zhiqiang 	/*
1645684ae3SHou Zhiqiang 	 * If the PSCI in SEC Firmware didn't work, avoid to update the
1745684ae3SHou Zhiqiang 	 * device node of PSCI. But still return 0 instead of an error
1845684ae3SHou Zhiqiang 	 * number to support detecting PSCI dynamically and then switching
1945684ae3SHou Zhiqiang 	 * the SMP boot method between PSCI and spin-table.
2045684ae3SHou Zhiqiang 	 */
21*026f30ecSYuantian Tang 	if (sec_firmware_support_psci_version() == PSCI_INVALID_VER)
2245684ae3SHou Zhiqiang 		return 0;
2345684ae3SHou Zhiqiang 	fdt_psci(fdt);
249a561753Smacro.wave.z@gmail.com 
259a561753Smacro.wave.z@gmail.com #if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_ARMV8_SECURE_BASE)
269a561753Smacro.wave.z@gmail.com 	/* secure code lives in RAM, keep it alive */
279a561753Smacro.wave.z@gmail.com 	fdt_add_mem_rsv(fdt, (unsigned long)__secure_start,
289a561753Smacro.wave.z@gmail.com 			__secure_end - __secure_start);
299a561753Smacro.wave.z@gmail.com #endif
309a561753Smacro.wave.z@gmail.com 
3145684ae3SHou Zhiqiang 	return 0;
3245684ae3SHou Zhiqiang }
33*026f30ecSYuantian Tang #endif
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