1b0ad8621SChander Kashyap /* 2b0ad8621SChander Kashyap * Copyright (C) 2010 Samsung Electronics 3b0ad8621SChander Kashyap * Naveen Krishna Ch <ch.naveen@samsung.com> 4b0ad8621SChander Kashyap * 5*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6b0ad8621SChander Kashyap */ 7b0ad8621SChander Kashyap 8b0ad8621SChander Kashyap #include <common.h> 9b0ad8621SChander Kashyap #include <asm/io.h> 10b0ad8621SChander Kashyap #include <asm/arch/sromc.h> 11b0ad8621SChander Kashyap 12b0ad8621SChander Kashyap /* 13b0ad8621SChander Kashyap * s5p_config_sromc() - select the proper SROMC Bank and configure the 14b0ad8621SChander Kashyap * band width control and bank control registers 15b0ad8621SChander Kashyap * srom_bank - SROM 16b0ad8621SChander Kashyap * srom_bw_conf - SMC Band witdh reg configuration value 17b0ad8621SChander Kashyap * srom_bc_conf - SMC Bank Control reg configuration value 18b0ad8621SChander Kashyap */ s5p_config_sromc(u32 srom_bank,u32 srom_bw_conf,u32 srom_bc_conf)19b0ad8621SChander Kashyapvoid s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf) 20b0ad8621SChander Kashyap { 21b0ad8621SChander Kashyap u32 tmp; 22b0ad8621SChander Kashyap struct s5p_sromc *srom = 23b0ad8621SChander Kashyap (struct s5p_sromc *)samsung_get_base_sromc(); 24b0ad8621SChander Kashyap 25b0ad8621SChander Kashyap /* Configure SMC_BW register to handle proper SROMC bank */ 26b0ad8621SChander Kashyap tmp = srom->bw; 27b0ad8621SChander Kashyap tmp &= ~(0xF << (srom_bank * 4)); 28b0ad8621SChander Kashyap tmp |= srom_bw_conf; 29b0ad8621SChander Kashyap srom->bw = tmp; 30b0ad8621SChander Kashyap 31b0ad8621SChander Kashyap /* Configure SMC_BC register */ 32b0ad8621SChander Kashyap srom->bc[srom_bank] = srom_bc_conf; 33b0ad8621SChander Kashyap } 34