1f56348afSSteve Sakoman /* 2f56348afSSteve Sakoman * (C) Copyright 2008 Texas Insturments 3f56348afSSteve Sakoman * 4f56348afSSteve Sakoman * (C) Copyright 2002 5f56348afSSteve Sakoman * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 6f56348afSSteve Sakoman * Marius Groeger <mgroeger@sysgo.de> 7f56348afSSteve Sakoman * 8f56348afSSteve Sakoman * (C) Copyright 2002 9f56348afSSteve Sakoman * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 10f56348afSSteve Sakoman * 111a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 12f56348afSSteve Sakoman */ 13f56348afSSteve Sakoman 14f56348afSSteve Sakoman /* 15f56348afSSteve Sakoman * CPU specific code 16f56348afSSteve Sakoman */ 17f56348afSSteve Sakoman 18f56348afSSteve Sakoman #include <common.h> 19f56348afSSteve Sakoman #include <command.h> 20f56348afSSteve Sakoman #include <asm/system.h> 21f56348afSSteve Sakoman #include <asm/cache.h> 22c2dd0d45SAneesh V #include <asm/armv7.h> 2353e6f6a6SMathieu J. Poirier #include <linux/compiler.h> 24f56348afSSteve Sakoman cpu_cache_initialization(void)2553e6f6a6SMathieu J. Poiriervoid __weak cpu_cache_initialization(void){} 2653e6f6a6SMathieu J. Poirier cleanup_before_linux_select(int flags)274d24a11eSSimon Glassint cleanup_before_linux_select(int flags) 28f56348afSSteve Sakoman { 29f56348afSSteve Sakoman /* 30f56348afSSteve Sakoman * this function is called just before we call linux 31f56348afSSteve Sakoman * it prepares the processor for linux 32f56348afSSteve Sakoman * 33f56348afSSteve Sakoman * we turn off caches etc ... 34f56348afSSteve Sakoman */ 35d460587aSStefano Babic #ifndef CONFIG_SPL_BUILD 36f56348afSSteve Sakoman disable_interrupts(); 37d460587aSStefano Babic #endif 38*617c1becSJoseph Chen disable_async_abort(); 39f56348afSSteve Sakoman 404d24a11eSSimon Glass if (flags & CBL_DISABLE_CACHES) { 41c2dd0d45SAneesh V /* 42c2dd0d45SAneesh V * turn off D-cache 43c2dd0d45SAneesh V * dcache_disable() in turn flushes the d-cache and disables MMU 44c2dd0d45SAneesh V */ 45f56348afSSteve Sakoman dcache_disable(); 46dc7100f4SAneesh V v7_outer_cache_disable(); 47f56348afSSteve Sakoman 48c2dd0d45SAneesh V /* 49c2dd0d45SAneesh V * After D-cache is flushed and before it is disabled there may 504d24a11eSSimon Glass * be some new valid entries brought into the cache. We are 514d24a11eSSimon Glass * sure that these lines are not dirty and will not affect our 524d24a11eSSimon Glass * execution. (because unwinding the call-stack and setting a 534d24a11eSSimon Glass * bit in CP15 SCTRL is all we did during this. We have not 544d24a11eSSimon Glass * pushed anything on to the stack. Neither have we affected 554d24a11eSSimon Glass * any static data) So just invalidate the entire d-cache again 564d24a11eSSimon Glass * to avoid coherency problems for kernel 57c2dd0d45SAneesh V */ 58c2dd0d45SAneesh V invalidate_dcache_all(); 5981b0618dSSjoerd Simons 6081b0618dSSjoerd Simons icache_disable(); 6181b0618dSSjoerd Simons invalidate_icache_all(); 624d24a11eSSimon Glass } else { 6381b0618dSSjoerd Simons /* 6481b0618dSSjoerd Simons * Turn off I-cache and invalidate it 6581b0618dSSjoerd Simons */ 6681b0618dSSjoerd Simons icache_disable(); 6781b0618dSSjoerd Simons invalidate_icache_all(); 6881b0618dSSjoerd Simons 694d24a11eSSimon Glass flush_dcache_all(); 704d24a11eSSimon Glass invalidate_icache_all(); 714d24a11eSSimon Glass icache_enable(); 724d24a11eSSimon Glass } 73f56348afSSteve Sakoman 7453e6f6a6SMathieu J. Poirier /* 7553e6f6a6SMathieu J. Poirier * Some CPU need more cache attention before starting the kernel. 7653e6f6a6SMathieu J. Poirier */ 7753e6f6a6SMathieu J. Poirier cpu_cache_initialization(); 7853e6f6a6SMathieu J. Poirier 79f56348afSSteve Sakoman return 0; 80f56348afSSteve Sakoman } 814d24a11eSSimon Glass cleanup_before_linux(void)824d24a11eSSimon Glassint cleanup_before_linux(void) 834d24a11eSSimon Glass { 844d24a11eSSimon Glass return cleanup_before_linux_select(CBL_ALL); 854d24a11eSSimon Glass } 86